UPD705100GJ-100-8 NEC [NEC], UPD705100GJ-100-8 Datasheet - Page 15

• Manufacturer Part Number: UPD705100GJ-100-8
• Description: V830TM 32-BIT MICROCONTROLLER
• Manufacturer: NEC [NEC]

(2) Lower halfword
4.1.2 Word access
Tw1 and Tw2 state, respectively. During write cycles, the low-order 16 bits of data and high-order 16 bits of data are
output to D0-D15 in the Ta/Tw1 state and Tw2 states, respectively.
Bus cycles in any of three bus states (Ta, Tw1, and Tw2) are used for word access.
During a read cycle, the low-order 16 bits of data and high-order 16 bits of data are sampled from D0-D15 in the
During read cycles, data is read from D0-D15.
During write cycles, D0-D15 data read from the write buffer is output to D0-D15.
Figure 4-2 shows the operation for lower halfword access. In this figure, A indicates the lower halfword (low-order
16 bits of the word).
operation
Internal
unit
operation
Internal
Read cycle
unit
Tw1 state
16
15
Read buffer
31
0
Read buffer
16
15
31
A
0
Figure 4-2. Lower Halfword Access
A
16
15
31
0
Figure 4-3. Read Cycle
16
15
31
A
0
Data bus
A
Data bus
operation
Internal
unit
operation
Write cycle
Internal
unit
Tw2 state
Write buffer
16
15
31
0
Read buffer
16
15
31
A
0
B
A
16
15
31
0
31
16
15
A
0
Data bus
B
Data bus
PD705100
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