UPD65 NEC [NEC], UPD65 Datasheet

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UPD65

Manufacturer Part Number
UPD65
Description
4-BIT SINGLE-CHIP MICROCONTROLLER FOR INFRARED REMOTE CONTROL TRANSMISSION
Manufacturer
NEC [NEC]
Datasheet

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Document No. U14380EJ2V0DS00 (2nd edition)
Date Published November 1999 N CP(K)
Printed in Japan
DESCRIPTION
a standby release function through key entry, and a programmable timer, the PD64A and 65 are suitable for infrared
remote control transmitters.
for program evaluation or small-quantity production.
FEATURES
APPLICATION
Equipped with low-voltage 2.0 V operation, a carrier generation circuit for infrared remote control transmission,
For the PD64A and 65, we have made available the one-time PROM product PD6P5 (under development)
• Program memory (ROM)
• Data memory (RAM)
• Built-in carrier generation circuit for infrared remote control
• 9-bit programmable timer
• Command execution time
• Stack level
• I/O pins (K
• Input pins (K
• Sense input pin (S
• S
• Power supply voltage
• Operating ambient temperature : T
• Oscillator frequency
• POC circuit
Infrared remote control transmitter (for AV and household electric appliances)
Unless otherwise specified, the PD65 is treated as the representative model throughout this document.
1
/LED pin (I/O)
PD64A : 1002
PD65 : 2026
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for availability
and additional information.
I/O
FOR INFRARED REMOTE CONTROL TRANSMISSION
)
I
)
0
, S
4-BIT SINGLE-CHIP MICROCONTROLLER
10 bits
10 bits
2
)
The mark
: 32
: 1 channel
: 16 s (when operating at f
: 1 level (Stack RAM is for data memory RF as well.)
: 8 units
: 4 units
: 2 units
: 1 unit (When in output mode, this is the remote control transmission display
: V
: f
pin.)
X
A
DD
= 2.4 to 8 MHz
= –40 to +85 C
DATA SHEET
= 2.0 to 3.6 V
4 bits
shows major revised points.
MOS INTEGRATED CIRCUIT
X
= 4 MHz: ceramic oscillation)
PD64A, 65
©
1999

Related parts for UPD65

UPD65 Summary of contents

Page 1

SINGLE-CHIP MICROCONTROLLER FOR INFRARED REMOTE CONTROL TRANSMISSION DESCRIPTION Equipped with low-voltage 2.0 V operation, a carrier generation circuit for infrared remote control transmission, a standby release function through key entry, and a programmable timer, the PD64A and 65 are ...

Page 2

ORDERING INFORMATION Part Number PD64AMC- -5A4 20-pin plastic SSOP (300 mil) PD65MC- -5A4 20-pin plastic SSOP (300 mil) Remark indicates ROM code suffix. PIN CONFIGURATION (TOP VIEW) 20-pin Plastic SSOP (300 mil) • PD64AMC- -5A4 • PD65MC- -5A4 K I/O6 ...

Page 3

BLOCK DIAGRAM CARRIER REM GENERATOR 9-bit S /LED 1 TIMER LIST OF FUNCTIONS Item ROM capacity 1002 Mask ROM RAM capacity 32 4 bits Stack 1 level (multiplexed with RF of RAM) I/O pins • Key input (K • Key ...

Page 4

PIN FUNCTIONS ............................................................................................................................... 1.1 List of Pin Functions ............................................................................................................................... 1.2 INPUT/OUTPUT Circuits of Pins ............................................................................................................ 1.3 Dealing with Unused Pins ...................................................................................................................... 2. INTERNAL CPU FUNCTIONS .......................................................................................................... 2.1 Program Counter (PC) ............................................................................................................................ 2.2 Stack Pointer (SP) ................................................................................................................................... 2.3 Address Stack ...

Page 5

INSTRUCTION SET .......................................................................................................................... 30 9.1 Machine Language Output by Assembler ............................................................................................. 30 9.2 Circuit Symbol Description .................................................................................................................... 31 9.3 Mnemonic to/from Machine Language (Assembler Output) Contrast Table ..................................... 32 9.4 Accumulator Operation Instructions ..................................................................................................... 36 9.5 Input/Output Instructions ....................................................................................................................... ...

Page 6

PIN FUNCTIONS 1.1 List of Pin Functions Pin No. Symbol These pins refer to the 8-bit I/O ports. I/O switching can I/O0 I/ made in 8-bit units. 15-20 In INPUT mode, a pull-down resistor ...

Page 7

INPUT/OUTPUT Circuits of Pins The input/output circuits of the PD64A and 65 pins are shown in partially simplified forms below. ( I/O0 I/O7 Output data latch output disable Input buffer Note The drive capability is held low. ...

Page 8

Dealing with Unused Pins The following connections are recommended for unused pins. Table 1-1. Connections for Unused Pins Pin K INPUT mode I/O OUTPUT mode REM S /LED Caution The I/O mode ...

Page 9

INTERNAL CPU FUNCTIONS 2.1 Program Counter (PC): 11 Bits Refers to the binary counter that holds the address information of the program memory. Figure 2-1. Program Counter Organization PC PC10 PC9 PC8 The program counter contains the address of ...

Page 10

Program Memory (ROM): 1002 steps 2026 steps The ROM consists of 10 bits per step, and is addressed by the program counter. The program memory stores programs and table data, etc. The 22 steps from 7EAH to 7FFH cannot ...

Page 11

Figure 2-4. Data Memory Organization R (high-order 4 bits ...

Page 12

Arithmetic and Logic Unit (ALU): 4 Bits The arithmetic and logic unit (ALU), which refers to an arithmetic circuit consisting of 4 bits, executes simple manipulations with priority given to logical operations. 2.9 Flags 2.9.1 Status flag (F) Pin ...

Page 13

Carry flag (CY) The carry flag is set ( the following cases: • If the ANL instruction or the XRL instruction is executed when bit 3 of the accumulator is “1” and bit 3 of the operand ...

Page 14

PORT REGISTERS (PX) The K port, the K port, the special ports (S I reset, port register values are shown below. Figure 3-1. Port Register Organization I/O7 I/O6 I/ ...

Page 15

K Port (P0) I/O The K port is an 8-bit input/output port for key scan output. I/O INPUT/OUTPUT mode is set by bit 1 of the P4 register read instruction is executed, the pin state can be ...

Page 16

K Port/Special Ports (P1) I 3.2.1 K port (P : bits 4 The K port is to the 4-bit input port for key entry. I The pin state can be read. Software can be used ...

Page 17

S port (bit 1 of P1) 2 The S port is an input port. 2 Use of the STOP mode release of the S When using the pin as a key input from a key matrix, enable (bit 3 ...

Page 18

Control Register 1 (P4) Control register 1 consists of 8 bits. The contents that can be controlled are as shown below. When reset, the register becomes 0010 0110B. Table 3-6. Control Register 1 (P4) Bit b 7 Name — ...

Page 19

TIMER 4.1 Timer Configuration The timer is the block used for creating a remote control transmission pattern. As shown in Figure 4-1, it consists of a 9-bit down counter ( flag ( ...

Page 20

Timer Operation The timer starts (counting down) when a value other than 0 is set for the down counter with a timer operation instruction. The timer operation instructions for making the timer start operation are shown below: MOV T0, ...

Page 21

Carrier Output The carrier for remote-controlled transmission can be output from the REM pin by clearing (to 0) bit 2 of the control register 0. As shown in Figure 4-3, in the case where the timer stops when the ...

Page 22

STANDBY FUNCTION 5.1 Outline of Standby Function To save current consumption, two types of standby modes, i.e., HALT mode and STOP mode, are made available. In STOP mode, the system clock stops oscillation. At this time, the X In ...

Page 23

Standby Mode Setup and Release The standby mode is set with the HALT #b standby mode to be set, the status flag (F) is required to have been cleared (to 0). The standby mode is released by the release ...

Page 24

Table 5-3. Standby Mode Setup (HALT #b Operand Value of HALT Instruction Setting Mode STOP STOP Note STOP 1 Any of ...

Page 25

Standby Mode Release Timing (1) STOP Mode Release Timing Figure 5-1. STOP Mode Release by Release Condition HALT instruction Standby release signal OPERATING mode Oscillation Clock Caution When a release condition is established in the STOP mode, the device ...

Page 26

RESET The system reset takes effect by means of the causes as follows: • When the POC circuit has detected low-power voltage • When the operand value is illegal or does not satisfy the precondition when the HALT instruction ...

Page 27

POC CIRCUIT The POC circuit monitors the power supply voltage and applies an internal reset in the microcontroller at the time of battery replacement. Cautions 1. There are cases in which the POC circuit cannot detect a low power ...

Page 28

Functions of POC Circuit The POC circuit has the following functions: • Generates an internal reset signal when V • Cancels an internal reset signal when V Here power supply voltage POC V DD 3.6 ...

Page 29

SYSTEM CLOCK OSCILLATOR The system clock oscillator consists of oscillators for ceramic resonators (f Ceramic resonator The system clock oscillator stops its oscillation when reset or in STOP mode. Caution When using the system clock oscillator, wire area indicated ...

Page 30

INSTRUCTION SET 9.1 Machine Language Output by Assembler The bit length of the machine language of this product is 10 bits per word. However, the machine language that is output by the assembler is extended to 16 bits per ...

Page 31

Circuit Symbol Description A : Accumulator ASR : Address Stack Register addr : Program memory address CY : Carry flag data4 : 4-bit immediate data data8 : 8-bit immediate data data10 : 10-bit immediate data F : Status flag ...

Page 32

Mnemonic to/from Machine Language (Assembler Output) Contrast Table Accumulator Operation Instructions Instruction Code Mnemonic Operand 1st Word 2nd Word ANL A, R0n FBEn A, R1n FAEn A, @R0H FAF0 A, @R0L FBF0 A, #data4 FBF1 data4 ORL A, R0n ...

Page 33

Input/output Instructions Instruction Code Mnemonic Operand 1st Word 2nd Word IN A, P0n FFF8 + n — A, P1n FEF8 + n — OUT P0n, A E5F8 + n — P1n, A E4F8 + n — ANL A, P0n FBF8 ...

Page 34

Branch Instructions Instruction Code Mnemonic Operand 1st Word 2nd Word JMP addr (Page 0) E8F1 addr addr (Page 1) E9F1 addr JC addr (Page 0) ECF1 addr addr (Page 1) EAF1 addr JNC addr (Page 0) EDF1 addr addr (Page ...

Page 35

Others Instruction Code Mnemonic Operand 1st Word 2nd Word HALT #data4 E2F1 data4 STTS #data4 E3F1 data4 R0n E3En SCAF FAF3 NOP E0E0 Operation 3rd Word Standby mode if statuses match F 1 else statuses match F ...

Page 36

Accumulator Operation Instructions ANL A, R0n ANL A, R1n <1> Instruction code : <2> Cycle count : 1 <3> Function : (A) CY The accumulator contents and the register Rmn contents are ANDed and ...

Page 37

ORL A, R0n ORL A, R1n <1> Instruction code : <2> Cycle count : 1 <3> Function : (A) ( The accumulator contents and the register Rmn contents are ORed and the results ...

Page 38

XRL A, @R0H XRL A, @R0L <1> Instruction code : 0 <2> Cycle count : 1 <3> Function : (A) CY (A) CY The accumulator contents and the program memory contents ...

Page 39

Input/Output Instructions IN A, P0n IN A, P1n <1> Instruction code : <2> Cycle count : 1 <3> Function : (A) (Pmn ...

Page 40

OUT Pn, #data8 <1> Instruction code : <2> Cycle count : 1 <3> Function : (Pn) The immediate data is transferred to port Pn. In this ...

Page 41

MOV R0n, A MOV R1n, A <1> Instruction code : <2> Cycle count : 1 <3> Function : (Rmn) The accumulator contents are transferred to register Rmn. MOV Rn, #data8 <1> Instruction code : 0 ...

Page 42

Branch Instructions The program memory consists of pages in steps of 1K (000H to 3FFH). However, as the assembler automatically performs page optimization unnecessary to designate pages. The pages allowed for each product are as follows. PD64A ...

Page 43

Subroutine Instructions The program memory consists of pages in steps of 1K (000H to 3FFH). However, as the assembler automatically performs page optimization unnecessary to designate pages. The pages allowed for each product are as follows. PD64A ...

Page 44

Timer Operation Instructions MOV A, T0 MOV A, T1 <1> Instruction code : 0 <2> Cycle count : 1 <3> Function : (A) CY The timer Tn contents are transferred ...

Page 45

MOV T, @R0 <1> Instruction code : <2> Cycle count : 1 <3> Function : (T) ((P13), (R0)) Transfers the program memory contents to the timer register T (t P13 ...

Page 46

STTS #data4 <1> Instruction code : <2> Cycle count : 1 <3> Function : if statuses match F else F Compares the ...

Page 47

ASSEMBLER RESERVED WORDS 10.1 Mask Option Directives When creating the PD64A and 65 program necessary to use a mask option directive in the assembler’s source program. 10.1.1 OPTION and ENDOP directives From the OPTION directive on to ...

Page 48

ELECTRICAL SPECIFICATIONS Absolute Maximum Ratings ( Parameter Symbol Power supply voltage V DD Input voltage I/O Output voltage V O Note High-level output current I REM OH LED One K Total of ...

Page 49

DC Characteristics (T = – Parameter Symbol High-level input voltage V S IH1 IH2 I IH3 I Low-level input voltage V S IL1 IL2 I/O ...

Page 50

AC Characteristics (T = – Parameter Symbol Command execution time high-level width When releasing STANDBY mode Note 10 + 52/f ...

Page 51

Recommended Ceramic Resonator (T Manufacturer Part Number (Order Disregarded) TDK Corp. FCR3.52MC5 FCR3.58MC5 FCR3.64MC5 FCR3.84MC5 FCR4.0MC5 FCR6.0MC5 FCR8.0MC5 Murata Mfg. Co., Ltd CSA2.50MG040 CST2.50MG040 CSA3.52MG CST3.52MGW CSTS0352MG03 CSA3.58MG CST3.58MGW CST0358MG03 CSA3.64MG CST3.64MGW CSTS0364MG03 CSA3.84MG CST3.84MGW CST0384MG03 CSA4.00MG CST4.00MGW CSTS0400MG03 CSA6.00MG ...

Page 52

CHARACTERISTIC CURVE (REFERENCE VALUES ( MHz 0.9 0.8 0.7 0.6 OPERATING mode 0.5 0.4 0.3 0.2 0.1 0 1.5 2 2.5 3 Power supply voltage (REM, LED) ...

Page 53

APPLIED CIRCUIT EXAMPLE Example of Application to System · Remote-control transmitter (48 keys; mode selection switch accommodated) K I/ /LED 1 REM OUT X IN GND Note S 2 ...

Page 54

PACKAGE DRAWINGS 20 PIN PLASTIC SSOP (300 mil NOTE Each lead centerline is located within 0. its true position (T.P.) at maximum material condition. Remark The dimensions and materials of ...

Page 55

RECOMMENDED SOLDERING CONDITIONS Carry out the soldered packaging of this product under the following recommended conditions. For details of the soldering conditions, refer to information material Semiconductor Device Mounting Technology Manual (C10535E). For soldering methods and conditions other than ...

Page 56

APPENDIX A. DEVELOPMENT TOOLS An emulator is provided for the PD64A and 65. Hardware Note • Emulator (EB- used to emulate the PD64A and 65. Note This is a product of Naito Densei Machida Mfg. Co., Ltd. ...

Page 57

APPENDIX B. FUNCTIONAL COMPARISON BETWEEN PD64A, 65 AND OTHER PRODUCTS Item PD62 ROM capacity 512 10 bits RAM capacity 32 4 bits Stack 1 level (multiplexed with RF of RAM) Key matrix keys Key extended input ...

Page 58

APPENDIX C. EXAMPLE OF REMOTE-CONTROL TRANSMISSION FORMAT (in the case of NEC transmission format in command one-shot transmission mode) Caution When using the NEC transmission format, please apply for a custom code at NEC. (1) REM output waveform (From <2> ...

Page 59

Carrier waveform (Enlarged waveform of each code’s high period) REM output 8.77 s (6) Bit array of each code Leader code Custom code Caution To ...

Page 60

Data Sheet U14380EJ2V0DS00 PD64A, 65 ...

Page 61

Data Sheet U14380EJ2V0DS00 PD64A ...

Page 62

NOTES FOR CMOS DEVICES 1 PRECAUTION AGAINST ESD FOR SEMICONDUCTORS Note: Strong electric field, when exposed to a MOS device, can cause destruction of the gate oxide and ultimately degrade the device operation. Steps must be taken to stop generation ...

Page 63

Regional Information Some information contained in this document may vary from country to country. Before using any NEC product in your application, please contact the NEC office in your country to obtain a list of authorized representatives and distributors. They ...

Page 64

MS-DOS is either a registered trademark or a trademark of Microsoft Corporation in the United States and/or other countries. PC/AT and PC DOS are trademarks of IBM Corp. The export of this product from Japan is regulated by the Japanese ...

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