DS1023-025 DALLAS [Dallas Semiconductor], DS1023-025 Datasheet - Page 14

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DS1023-025

Manufacturer Part Number
DS1023-025
Description
8-Bit Programmable Timing Element
Manufacturer
DALLAS [Dallas Semiconductor]
Datasheet
TERMINOLOGY
Period: The time elapsed between the leading edge of the first pulse and the leading edge of the
following pulse.
t
point on the trailing edge, or the 1.5V point on the trailing edge and the 1.5V point on the leading edge.
t
input pulse.
t
input pulse.
t
point on the corresponding edge of the output pulse.
TIMING DIAGRAM: NON-LATCHED PARALLEL MODE
(
TIMING DIAGRAM: LATCHED PARALLEL MODE (
WI
RISE
FALL
D
P
(Time Delay): The elapsed time between the 1.5V point on the edge of an input pulse and the 1.5V
/S = 0, LE = 1) Figure 10
(Pulse Width): The elapsed time on the pulse between the 1.5V point on the leading edge and the 1.5V
(Input Rise Time): The elapsed time between the 20% and the 80% point on the leading edge of the
(Input Fall Time): The elapsed time between the 80% and the 20% point on the trailing edge of the
14 of 16
P
/S = 0) Figure 11
DS1023

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