HEF4082BT,653 NXP Semiconductors, HEF4082BT,653 Datasheet

IC 4INPUT AND GATE 14SOIC

HEF4082BT,653

Manufacturer Part Number
HEF4082BT,653
Description
IC 4INPUT AND GATE 14SOIC
Manufacturer
NXP Semiconductors
Series
4000Br
Datasheets

Specifications of HEF4082BT,653

Number Of Circuits
2
Package / Case
14-SOIC (3.9mm Width), 14-SOL
Logic Type
AND Gate
Number Of Inputs
4
Current - Output High, Low
2.4mA, 2.4mA
Voltage - Supply
4.5 V ~ 15.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Product
AND
Logic Family
HEF4000
High Level Output Current
- 3.6 mA
Low Level Output Current
3.6 mA
Propagation Delay Time
25 ns
Supply Voltage (max)
15.5 V
Supply Voltage (min)
3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
933373100653
HEF4082BTD-T
HEF4082BTD-T
1. General description
2. Features and benefits
3. Ordering information
Table 1.
All types operate from
Type number
HEF4082BP
HEF4082BT
Ordering information
40
The HEF4082B is a dual 4-input AND gate. The outputs are fully buffered for highest
noise immunity and pattern insensitivity to output impedance variations.
It operates over a recommended V
(usually ground). Unused inputs must be connected to V
HEF4082B is suitable for use over both the industrial (40 C to +85 C) and automotive
(40 C to +125 C) temperature ranges.
Package
Name
DIP14
SO14
C to +125
HEF4082B
Dual 4-input AND gate
Rev. 4 — 23 August 2011
Fully static operation
5 V, 10 V, and 15 V parametric ratings
Standardized symmetrical output characteristics
Inputs and outputs are protected against electrostatic effects
Operates across the automotive temperature range from 40 C to +125 C
Complies with JEDEC standard JESD 13-B
C.
Description
plastic dual in-line package; 14 leads (300 mil)
plastic small outline package; 14 leads; body width 3.9 mm
DD
power supply range of 3 V to 15 V referenced to V
DD
, V
SS
, or another input. The
Product data sheet
Version
SOT27-1
SOT108-1
SS

Related parts for HEF4082BT,653

HEF4082BT,653 Summary of contents

Page 1

HEF4082B Dual 4-input AND gate Rev. 4 — 23 August 2011 1. General description The HEF4082B is a dual 4-input AND gate. The outputs are fully buffered for highest noise immunity and pattern insensitivity to output impedance variations. It operates ...

Page 2

... NXP Semiconductors 4. Functional diagram aaa-000168 Fig 1. Functional diagram 5. Pinning information 5.1 Pinning Fig 3. Pin configuration 5.2 Pin description Table 2. Pin description Symbol Pin 1A, 1B, 1C 2A, 2B, 2C 10, 11 HEF4082B Product data sheet Fig HEF4082B n. aaa-000170 Description input input output not connected ...

Page 3

... NXP Semiconductors 6. Functional description [1] Table 3. Function table Input [ HIGH voltage level LOW voltage level don’t care. 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to V Symbol Parameter V supply voltage DD I input clamping current ...

Page 4

... NXP Semiconductors 9. Static characteristics Table 6. Static characteristics unless otherwise specified Symbol Parameter Conditions I  < 1 A V HIGH-level IH O input voltage I  < 1 A V LOW-level IL O input voltage I  < 1 A V HIGH-level OH O output voltage I  < 1 A ...

Page 5

... NXP Semiconductors 10. Dynamic characteristics Table 7. Dynamic characteristics   pF amb Symbol Parameter t propagation delay pd t HIGH to LOW output THL transition time t LOW to HIGH output TLH transition time [1] The typical value of the propagation delay and output transition time can be calculated with the extrapolation formula (C ...

Page 6

... NXP Semiconductors Table 9. Measurement points Supply voltage Test data is given in Table Definitions for test circuit: DUT = Device Under Test load capacitance including jig and probe capacitance termination resistance should be equal to the output impedance Z T Fig 5. Test circuit Table 10. Test data Supply voltage ...

Page 7

... NXP Semiconductors 12. Package outline DIP14: plastic dual in-line package; 14 leads (300 mil pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions UNIT max. min. max. mm 4.2 0.51 3.2 inches 0.17 0.02 0.13 Note 1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. ...

Page 8

... NXP Semiconductors SO14: plastic small outline package; 14 leads; body width 3 pin 1 index 1 e DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.25 1.45 mm 1.75 0.25 0.10 1.25 0.010 0.057 inches 0.069 0.01 0.004 0.049 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...

Page 9

... Modifications: The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • Legal texts have been adapted to the new company name where appropriate. Temperature range maximum increased from 85 C to 125 C throughout the data sheet. ...

Page 10

... In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or ...

Page 11

... NXP Semiconductors Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. 16. Contact information For more information, please visit: For sales office addresses, please send an email to: HEF4082B Product data sheet 15 ...

Page 12

... NXP Semiconductors 17. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 4 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 5 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 2 6 Functional description . . . . . . . . . . . . . . . . . . . 3 7 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . 5 11 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 12 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 7 13 Abbreviations ...

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