UPD30121 NEC [NEC], UPD30121 Datasheet - Page 60

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UPD30121

Manufacturer Part Number
UPD30121
Description
VR4121TM 64-/32-BIT MICROPROCESSOR
Manufacturer
NEC [NEC]
Datasheet

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60
Address setup time (to command signal )
Address hold time (from command signal )
Command signal recovery time
LCDRDY sampling start time
Command signal delay time from LCDRDY
LCDRDY hold time (from command signal )
Data output setup time (to command signal )
Data output hold time (from command signal )
Data input setup time (to command signal )
Data input hold time (from command signal )
(16) LCD interface parameter (1/2)
Notes 1. With the V
2. The values of N is set by using the WLCD/M (0:1) bits of the BCUSPEEDREG register.
The value of T is set by using the CLKSEL (0:2) signals (TxD/CLKSEL2, RTS#/CLKSEL1, and
DTR#/CLKSEL0 pins).
Remarks 1. Do not set CLKSEL (2:0) signal
CLKSEL2
Signal
1
1
1
1
0
0
0
0
Parameter
R
4121, the RD# and WR# signals are called the command signals for the LCD interface.
2. Do not set CLKSEL (2:0) signal
CLKSEL1
= 111.
= 110, 101 with 131 MHz model.
Note 1
Signal
1
1
0
0
1
1
0
0
Note 1
Note 1
CLKSEL0
Note 1
Note 1
Notes 1, 2
Notes 1, 2
Note 1
Signal
Note 1
1
0
1
0
1
0
1
0
Data Sheet U14691EJ1V0DS00
Symbol
t
t
t
t
RHCH
t
DVCH
CHDV
t
t
t
t
t
CLR
RYZ
T (ns)
AS
AH
RY
DS
DH
RFU
35
33
30
33
30
33
38
Condition
WLCD/M1
Bit
0
0
1
1
WLCD/M0
T
T
Bit
MIN.
0
1
0
1
(N + 2)
15
30
25
0
0
0
0
5
N
(TClock)
T
N
8
6
4
2
(N + 2) + 29
MAX.
PD30121
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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