MP7680JE EXAR [Exar Corporation], MP7680JE Datasheet - Page 10

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MP7680JE

Manufacturer Part Number
MP7680JE
Description
5 V CMOS 12-Bit Quad Double-Buffered Multiplying Digital-to-Analog Converter
Manufacturer
EXAR [Exar Corporation]
Datasheet
I
OUT1A, B, C, D
XFER=WR2
Transferring
Once one or all of the input latches have been loaded, the
condition XFER = WR2= low transfers the content of ALL
the input latches in the DAC latches. The output of the
DAC latches (DA11-DA0) changes and the DAC current
(I
t
Examples of DACs updating sequences:
1) Simultaneous updates of any number of DACs. The
S
MP7680
OUT
(
system uses from one (two) to four (eight) cycles to
write from a 12 (8) bit bus into B1/B2 latches. One
Figure 6.
DATA
A
Figure
Rev. 3.10
) will reach a new stable value within the settling time
WR1
0,
CS
A
1
).
7. Simultaneous
Data to the DAC Latches
Valid
= 0
Valid
= 1
B1/B2 and XFER
WR1 and WR2
Updates
Valid
= 2
Figure
A
I
I
OUTB
OUTC
1
, A
CS
0
Valid
= 3
of DACs
9. Automatic
= 1
Transfer
10
2) Individual DAC update. The condition WR2 = XFER =
3) Automatic transfer to DAC latches. An 8-bit bus can
4) Transfer by a second device. A processor may load the
= 2
transfer cycle updates the output of all DACs
(
low makes the DAC latches transparent. A writing to
the B1/B2 latches updates the DAC outputs (
update any DAC with two cycles by connecting WR1 =
WR2 and B1/B2= XFER. This is the correct individual
DAC update for 8-bit busses (
input latches while the final XFER pulse is left to an-
other device.
Figure 7.
WR2 = XFER
to DAC Latches
I
A
DATA
I
OUT1B
OUT1D
1
WR1
, A
Figure
CS
)
0
8. Individual
Valid
= 1
Figure 9.
DAC Update
Valid
= 3
).
Figure 8.
).

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