UPD16488AP NEC [NEC], UPD16488AP Datasheet - Page 62

• Manufacturer Part Number: UPD16488AP
• Description: 1/92 DUTY LCD CONTROLLER/DRIVER WITH FOUR-LEVEL GRAY SCALE, ON-CHIP RAM
• Manufacturer: NEC [NEC]

6.13 Display Start Line Setting Register (R12)
Default settings (initial values set by reset command)
6.14 Blink X Address Register (R13)
automatically incremented each time the blink data RAM is accessed.
Default settings (initial values set by reset command)
6.15 Blink Start Line Address Register (R14)
display mode. The range of blinking lines is determined based on the contents of this register and the blink end line
address register.
Default settings (initial values set by reset command)
6.16 Blink End Line Address Register (R15)
display mode. The range of blinking lines is determined based on the contents of this register and the blink start line
address register.
Default settings (initial values set by reset command)
Display start line set specifies the top line in the display.
The blink X address register specifies the X address of the blink data RAM accessed by the CPU. This address is
The blink start line address register specifies the start line address of the display RAM accessed when the CPU uses blink
The blink end line address register specifies the end line address of the display RAM accessed when the CPU uses blink
RS
RS
RS
RS
D
D
D
D
62
1
−
1
−
1
−
1
−
7
7
7
7
D
D
D
D
D
D
D
D
−
0
−
−
−
0
−
0
7
6
7
6
7
6
7
6
DSL6
BSL6
BEL6
D
D
D
D
D
D
D
D
0
−
−
0
0
6
5
6
5
6
5
6
5
DSL5
BSL5
BEL5
D
D
D
D
D
D
D
D
0
−
−
0
0
5
4
5
4
5
4
5
4
DSL4
BSL4
BEL4
D
D
D
D
D
D
D
D
0
−
0
0
0
4
3
4
3
4
3
4
3
DSL3
BXA3
BSL3
BEL3
D
D
D
D
D
D
D
D
Data Sheet S15745EJ2V0DS
0
0
0
0
3
2
3
2
3
2
3
2
DSL2
BXA2
BSL2
BEL2
D
D
D
D
D
D
D
D
0
0
0
0
2
1
2
1
2
1
2
1
DSL1
BXA1
BSL1
BEL1
D
D
D
D
D
D
D
D
0
0
0
0
1
0
1
0
1
0
1
0
DSL0
BXA0
BSL0
BEL0
D
D
D
D
0
0
0
0
Setting
Setting
−
−
µ µ µ µ PD16488A