ax88190 ASIX Electronics Corporation, ax88190 Datasheet - Page 15

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ax88190

Manufacturer Part Number
ax88190
Description
Pcmcia 10/100m Fast Ethernet Mac Controller
Manufacturer
ASIX Electronics Corporation
Datasheet

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The I/O Base registers (LIOBASE0 and LIOBASE1) determine the base address of the I/O range used to
access the LAN specific registers (MAC Core Registers).
I/O Base Register 0
I/O Base Register 1
4.1.2 Configuration and Status Register of LAN (LCSR) Offset 3C2H (Read/Write)
4.1.3 I/O Base Register 0/1 of LAN (LIOBASE0/1) Offset 3CAH/3CCH (Read/Write)
FIELD
FIELD
FIELD
7:3
7:0
7:0
2
1
0
AX88190
R/W/C
R/W/C
R/W/C
R/W
R/W
R/W
R
R
-
Reserved
PPwrDwn : PHY power down setting
While this bit set to 1, PPWDN pin (pin 114) will be active to force PHY chip into power
down mode. As for PPWDN is active high or active low. Please refer section 2.7 Power on
configuration setup signal cross reference table.
Intr : Interrupt Request
The LAN function will set this bit to 1 when it need interrupt service and set it to 0 when it
is not request interrupt service.
IntrAck : Interrupt Acknowledge
This bit will be 0. The Intr will reflect the status of interrupt requesting.
Base I/O address bit 7 – 0.
Base I/O address bit 15 – 8.
PCMCIA Fast Ethernet MAC Controller
15
DESCRIPTION
DESCRIPTION
DESCRIPTION
ASIX ELECTRONICS CORPORATION

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