sh6631a SinoWealth Micro-Electronics Corp. Ltd, sh6631a Datasheet - Page 5

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sh6631a

Manufacturer Part Number
sh6631a
Description
Mask 4-bit Microcontroller
Manufacturer
SinoWealth Micro-Electronics Corp. Ltd
Datasheet
4. Timer0
4.1. Configuration and Operation
Timer-0 consists of an 8-bit write-only timer load register
(TL0L, TL0H), and an 8-bit read-only timer counter (TC0L,
TC0H). The counter and load register both have low order
digits and high order digits. Writing data into the timer load
register (TL0L, TL0H) can initialize the timer counter.
Load register programming: Write the low-order digit first,
and then the high-order digit. The timer counter is
automatically loaded with the contents of the load register
when the high order digit is written or counter counts
overflow from $FF to $00.
Timer Load Register: Since register H controls the physical
READ/WRITE operations, follow the following rules:
Write Operation:
Read Operation:
4.2. Timer0 Interrupt
The timer overflow will generate an internal interrupt request when the counter counts overflow from $FF to $00. If the interrupt
enable flag is enabled, then a timer interrupt service routine will start. This can also be used to wake CPU from HALT mode.
Low nibble first;
High nibble to update the counter
5
Figure. 1 Timer Load register Configure
High nibble first;
Followed by Low nibble.
Load Reg. L
Latch Reg. L
8-bit timer counter
Load Reg. H
SH6631A

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