sh66l16a SinoWealth Micro-Electronics Corp. Ltd, sh66l16a Datasheet - Page 26

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sh66l16a

Manufacturer Part Number
sh66l16a
Description
16k 4-bit Low Power Micro-controller With Lcd Driver
Manufacturer
SinoWealth Micro-Electronics Corp. Ltd
Datasheet
15. Watchdog Timer (WDT)
The watchdog timer is a down-count counter, and its clock source is OSCX (200kHz RC) if the “ System Clock selection” code
option is equal to CK = 0,0 (200kHz RC as system clock with 32.768kHz Crystal for the Base Timer), or CK = 0,1 (200kHz RC
as system clock with 32kHz RC for the Base Timer), or CK = 1,1 (200kHz RC as system clock). The watchdog timer’s clock
source can also be fetched from the OSC (32.768kHz Crystal) if the “ System Clock selection” code option is equal to CK = 1,0
(32.768kHz Crystal as system clock). Since its clock source is fetched from the system clock, so it will not run in the STOP mode.
The watchdog timer automatically generates a device reset when it overflows. It can be enabled or disabled permanently by
using the code option. To prevent it timing out and generating a device reset condition, users should write watchdog timer reset
bit ($1E Bit3) as “1” before timing-out.
System Register $1E: Watchdog Timer (WDT)
The watchdog timer has a time-out period of more than 20ms (V
desired, a prescaler with a division ratio of up to 1:2048 can be assigned to the watchdog timer under software control by writing
to the T0M register (Bit2 - 0 of the system register $02).
15.1. If the “ Single Solar Supply Application selection” code option is equal to “ Enable ”, the WDT’s time-out period is defined
Prescaler Divide Ratio: (200kHz RC as the system clock)
Prescaler Divide Ratio: (32.768kHz Crystal as the system clock)
Address
TM0.2
TM0.2
$1E
as below.
1
1
1
1
0
1
1
1
1
0
WDT
Bit 3
TM0.1
TM0.1
X
X
1
1
0
0
1
1
0
0
32.768kHz Crystal
200KHz RC/
Bit 2
SYSTEM
1/4 OSC
CLOCK
TM0.0
TM0.0
X
X
1
0
1
0
1
0
1
0
Bit 1
0.122ms
0.02ms/
Bit 0
SCALER_1
1:1
1:2
1:4
Prescaler divide ratio
1:1
1:2
1:4
1:8
1:32
Prescaler divide ratio
1:8
1:32
Internal
/1024
R/W
R/W
WDT Time
out Period
20ms/125ms
Bit3: Watchdog timer overflow flag/reset register
26
DD
/1
(Write 1 to reset WDT)
= 1.5V, 200kHz RC oscillator). If longer time-out periods are
/2
/4
Time out period
Final WDT
PRESCALER
/8
TM0
/32 /128
20.48ms
40.96ms
81.92ms
163.84ms
655.36ms
16ms
32ms
64ms
128ms
512ms
Remarks
Timer-out period
Timer-out period
/512
/2048
SH66L16A

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