ma009a Megawin Technology, ma009a Datasheet - Page 7

• Manufacturer Part Number: ma009a
• Description: 24-bit I/o Extender With Interrupt Function
• Manufacturer: Megawin Technology

Port P1 interrupts enable register.
If P1CR.x == 0 (input mode)
Port P1 interrupts events status register.
This function is same as port P0. When a falling edge signal is occurs in any interrupt enabled (the bit 0 or bit 1 of
P1IEN is set to 1) pins of port P1, the corresponding bit of P1EVT will be set to 1. The interrupt will be generated
from the INTB (1!0) pin in this condition, and the mater (for example, a microcontroller) can read the interrupt
status from P1EVT. The master can send EVTCLR (13H) command to MA009 to clear the P1EVT after the
interrupt event is processed.
Output Port 2
Port P2 output status register.
Port P2 output mode control register
P2OR.0: P2.0 ~ P2.3 CMOS/NMOS selector, 0: CMOS, 1: NMOS
P2OR.1: P2.4 ~ P2.7 CMOS/NMOS selector, 0: CMOS, 1: NMOS
Port P2 sink control register.
P2SCR.0: P2.0 ~ P2.3 output sink ability control, 0: weak, 1: strong (large sink current)
P2SCR.1: P2.4 ~ P2.7 output sink ability control, 0: weak, 1: strong (large sink current)
Port P2 pull high control register.
P2PR.0: P2.0 ~ P2.3 pull high control, 0: enable (large resistance, 350K), 1: disable
P2PR.1: P2.4 ~ P2.7 pull high control, 0: enable (large resistance), 1: disable
MEGAWIN
P2SCR
P1EVT
P1IEN
P2OR
Name
Name
Name
Name
Name
Name
P2PR
P1IEN.0 ~ P1IEN.7: P1.0 ~ P1.7 falling edge interrupts control, 0: disable, 1: enable
P2
ST17
IE17
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
P27
-
-
-
ST16
Bit 6
IE16
Bit 6
Bit 6
Bit 6
Bit 6
Bit 6
P26
-
-
-
ST15
IE15
Bit 5
Bit 5
Bit 5
Bit 5
Bit 5
Bit 5
P25
-
-
-
MA009A Technical Summary
ST14
Bit 4
IE14
Bit 4
Bit 4
Bit 4
Bit 4
Bit 4
P24
-
-
-
ST13
Bit 3
IE13
Bit 3
Bit 3
Bit 3
Bit 3
Bit 3
P23
-
-
-
ST12
Bit 2
IE12
Bit 2
Bit 2
Bit 2
Bit 2
Bit 2
P22
-
-
-
OR21
SC21
PR21
ST11
Bit 1
IE11
Bit 1
Bit 1
Bit 1
Bit 1
Bit 1
P21
OR20
SC20
PR20
ST10
Bit 0
IE10
Bit 0
Bit 0
Bit 0
Bit 0
Bit 0
P20
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