74HC1G32GW,125 NXP Semiconductors, 74HC1G32GW,125 Datasheet

IC 2-INPUT OR GATE SC88A-5

74HC1G32GW,125

Manufacturer Part Number
74HC1G32GW,125
Description
IC 2-INPUT OR GATE SC88A-5
Manufacturer
NXP Semiconductors
Series
74HCr
Datasheet

Specifications of 74HC1G32GW,125

Number Of Circuits
1
Package / Case
SC-70-5, SC-88A, SOT-323-5, SOT-353, 5-TSSOP
Logic Type
OR Gate
Number Of Inputs
2
Current - Output High, Low
2.6mA, 2.6mA
Voltage - Supply
2 V ~ 6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Product
OR
Logic Family
HC
High Level Output Current
- 2.6 mA
Low Level Output Current
2.6 mA
Propagation Delay Time
8 ns
Supply Voltage (max)
6 V
Supply Voltage (min)
2 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
74HC1G32GW-G
74HC1G32GW-G
935245750125
1. General description
2. Features
3. Ordering information
Table 1.
4. Marking
Table 2.
Type number
74HC1G32GW
74HCT1G32GW
74HC1G32GV
74HCT1G32GV
Type number
74HC1G32GW
74HCT1G32GW
74HC1G32GV
74HCT1G32GV
Ordering information
Marking codes
Package
Temperature range Name
40 C to +125 C
40 C to +125 C
74HC1G32 and 74HCT1G32 are high-speed Si-gate CMOS devices. They provide a
2-input OR function.
The HC device has CMOS input switching levels and supply voltage range 2 V to 6 V.
The HCT device has TTL input switching levels and supply voltage range 4.5 V to 5.5 V.
The standard output currents are half those of the 74HC32 and 74HCT32.
I
I
I
I
I
74HC1G32; 74HCT1G32
2-input OR gate
Rev. 05 — 14 March 2008
Symmetrical output impedance
High noise immunity
Low power dissipation
Balanced propagation delays
SOT353-1 and SOT753 package options
TSSOP5
SC-74A
Description
plastic thin shrink small outline package; 5 leads;
body width 1.25 mm
plastic surface-mounted package; 5 leads
Marking code
HG
TG
H32
T32
Product data sheet
Version
SOT353-1
SOT753

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74HC1G32GW,125 Summary of contents

Page 1

OR gate Rev. 05 — 14 March 2008 1. General description 74HC1G32 and 74HCT1G32 are high-speed Si-gate CMOS devices. They provide a 2-input OR function. The HC device has CMOS input switching levels and supply voltage range ...

Page 2

... NXP Semiconductors 5. Functional diagram Fig 1. Logic symbol Fig 3. Logic diagram 6. Pinning information 6.1 Pinning Fig 4. Pin configuration 6.2 Pin description Table 3. Pin description Symbol Pin GND 74HC_HCT1G32_5 Product data sheet 4 Y mna164 Fig 2. IEC logic symbol B A 74HC1G32 74HCT1G32 GND ...

Page 3

... NXP Semiconductors 7. Functional description Table 4. Function table H = HIGH voltage level LOW voltage level Inputs Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter V supply voltage CC I input clamping current ...

Page 4

... NXP Semiconductors 10. Static characteristics Table 7. Static characteristics Voltages are referenced to GND (ground = 0 V). All typical values are measured at T Symbol Parameter 74HC1G32 V HIGH-level input IH voltage V LOW-level input IL voltage V HIGH-level output OH voltage V LOW-level output OL voltage I input leakage current I I supply current CC C input capacitance ...

Page 5

... NXP Semiconductors Table 7. Static characteristics Voltages are referenced to GND (ground = 0 V). All typical values are measured at T Symbol Parameter I supply current CC I additional supply CC current C input capacitance I 11. Dynamic characteristics Table 8. Dynamic characteristics GND = 6.0 ns. All typical values are measured Symbol Parameter ...

Page 6

... NXP Semiconductors 12. Waveforms Fig 5. The input (A and B) to output (Y) propagation delays Measurement points are given Load capacitance including jig and probe capacitance Termination resistance should be equal to output impedance Z T Fig 6. Load circuitry for switching times 74HC_HCT1G32_5 Product data sheet 74HC1G32; 74HCT1G32 ...

Page 7

... NXP Semiconductors 13. Package outline TSSOP5: plastic thin shrink small outline package; 5 leads; body width 1. DIMENSIONS (mm are the original dimensions UNIT max. 0.1 1.0 mm 1.1 0.15 0 0.8 Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION IEC SOT353-1 Fig 7 ...

Page 8

... NXP Semiconductors Plastic surface-mounted package; 5 leads DIMENSIONS (mm are the original dimensions UNIT 0.100 0.40 1.1 0.26 mm 0.013 0.25 0.9 0.10 OUTLINE VERSION IEC SOT753 Fig 8. Package outline SOT753 (SC-74A) 74HC_HCT1G32_5 Product data sheet scale 3.1 1.7 3.0 0.6 0.95 2.7 1.3 2 ...

Page 9

... NXP Semiconductors 14. Abbreviations Table 9. Abbreviations Acronym Description DUT Device Under Test TTL Transistor-Transistor Logic 15. Revision history Table 10. Revision history Document ID Release date 74HC_HCT1G32_5 20080314 • Modifications: Pin description of Pin 4 changed from input to output in 74HC_HCT1G32_4 20070514 74HC_HCT1G32_3 20020515 74HC_HCT1G32_2 20010406 74HC_HCT1G32 ...

Page 10

... Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...

Page 11

... NXP Semiconductors 18. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 4 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 2 7 Functional description . . . . . . . . . . . . . . . . . . . 3 8 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . 5 12 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 13 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 7 14 Abbreviations ...

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