dm9000b Davicom Semiconductor, Inc., dm9000b Datasheet - Page 45
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dm9000b
Manufacturer Part Number
dm9000b
Description
Ethernet Controller With General Processor Interface
Manufacturer
Davicom Semiconductor, Inc.
Datasheet
1.DM9000B.pdf
(56 pages)
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10.3 AC Electrical Characteristics & Timing Waveforms
10.3.1 TP Interface
10.3.2 Oscillator/Crystal Timing
10.3.3 Power On Reset Timing
Note: The DM9000B needs the time about 3ms to down load the setting from EEPROM after PWRST# deasserted,
During the period, the CS# pin is not recognized even no EEPROM present. So, please note that processor only
access DM9000B after PWRST# deasserted 3ms.
Final
Version: DM9000B-13-DS-F02
June 4, 2009
Symbol
Symbol
Symbol
T
T
T
X
t
t
TR/F
T
t
PWH
TDC
CKC
PWL
OST
TM
t/T
T1
T2
T3
T4
OSC Clock Cycle
OSC Pulse Width High
OSC Pulse Width Low
100TX+/- Differential Rise/Fall Time
100TX+/- Differential Rise/Fall Time
Mismatch
100TX+/- Differential Output Duty Cycle
Distortion
100TX+/- Differential Output Peak-to-Peak
Jitter
100TX+/- Differential Voltage Overshoot
Strap pins
PWRST#
PWRST# Low Period
Strap pin hold time with PWRST#
PWRST# high to EECS high
PWRST# high to EECS burst end
EECS
Parameter
Parameter
Parameter
T1
Ethernet Controller with General Processor Interface
Min.
40
1
-
-
39.9988
Min.
16
16
Min.
3.0
0
0
0
0
11.31
Typ.
--
-
-
T2
Typ.
T3
Typ.
40
20
20
-
-
-
-
-
Max.
3
-
-
-
40.0012
T4
Max.
Max.
24
24
0.5
0.5
1.4
5.0
5
Unit
ms
ms
ns
us
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
%
Conditions
DM9000B
-
-
Conditions
Conditions
30ppm
45