dm9301fp Davicom Semiconductor, Inc., dm9301fp Datasheet
dm9301fp
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dm9301fp Summary of contents
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... FIFO is used to buffer data between the FX and TX interfaces). Furthermore, due to the excellent rise/fall time control by a built-in wave- shaping filter, the DM9301FP needs no external filter to transport signals to the media on the 100Base-TX interface. Patent-Pending Circuits • ...
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... Table of Contents General Description.................................................. 1 Block Diagram .......................................................... 1 Table of contents...................................................... 2 Features ................................................................... 3 Pin Configuration: DM9301FP QFP ......................... 4 Pin Description ......................................................... 5 Functional Description............................................ 10 100Base- Operation ................................. 10 FX PECL Receiver.............................................. 10 FX Receiver Clock Recovery Module................. 10 FX NRZI to NRZ Converter ................................ 10 FX Serial to Parallel Converter ........................... 11 FX Code Group Alignment Monitor .................... 11 TX Scrambler ...
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... Compliant with ANSI X3T12 TP-PMD 1995 standard • Compliant with ANSI X3.166 FDDI-PMD • Supports Half and Full Duplex operation 100Mbps, the DM9301FP operates in Full Duplex mode at all times • High performance 100Mbps clock generator and data recovery circuit • Controlled output edge rates in the 100Base-TX ...
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... Pin Configuration: DM9301FP QFP 1 TPRXI+ TPRXI AVCC 4 AVCC 5 AGND 6 AGND 7 AVCC 8 BGREF 9 BGRET 10 AVCC AGND 11 12 AGND TPTXO TPTXO+ 15 AVCC 16 AGND AGND 17 18 PECLTXO- PECLTXO AGND 21 AVCC 22 PECLSD- 23 PECLSD+ 24 PECLRXI- 25 PECLRXI+ 26 AVCC OSC/ AGND 30 OSC/XTL# 4 100Mbps Ethernet Fiber/Twisted Pair Single Chip Media Converter ...
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... These outputs drive NRZI encoded data for PECL FX interface. I 100BASE-FX PECL Signal detect: These pins are differential signals that indicate to the DM9301FP that the Optical Module interface is detecting valid optical energy. I Crystal or Oscillator Input: This pin should connect to one side of a 25MHz, 50ppm crystal if OSC/XTL#=0 ...
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... VCC is stable. I Send Halt on no Link Condition: Causes the DM9301FP to Send out a Halt symbol to the TX interface link active or send out a Halt symbol to the FX interface link active. Propagates a no-link condition to the Link Partner if 1, Idle symbol if 0 ...
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... OD TX Error LED: Indicates an error was detected by the TX Code Group Alignment Monitor function on the TX receiver. Active low (Open Drain Output) The DM9301FP incorporates a "monostable" function on the TXERRLED output. This ensures that even minimum size errors generate adequate LED ON to insure visibility. I ...
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... TPO0 92, 91, 89, TPI3, TPI2, TPI1, 88 TPI0, 8 100Mbps Ethernet Fiber/Twisted Pair Single Chip Media Converter I Mux. Control 1 and 0: Used for testing the DM9301FP Data Paths. Set to zero for normal operation. Initiated at an H/W reset. Active high. MUXCTL1 MUXCTL0 Test Port Output: Reflects the DM9301FP internal status ...
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... TPEN 87 TPMUX 41 BPSCRAM Power and Ground Pins : The power (VCC) and ground (GND) pins of the DM9301FP are grouped in pairs of two categories - Digital Circuitry Power/Ground Pairs and Analog Circuitry Power/Ground Pair. Group A - Digital Supply Pairs 33, 42, 50, 53, DGND 63, 68, 72, 78, 82, 90, 98 37, 46, 51, 56, ...
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... Functional Description The DM9301FP Fast Ethernet single-chip TX/FX media converter, provides the functionality as specified in IEEE802.3, integrates the complete 100BASE-TX and a PECL optic module interface for 100Base-FX. The DM9301FP implements the PCS, PMA, and TP-PMD sublayer functions, as defined by specification. The term “X” will be used to describe the sections used in the fiber PHY layer interface. The term “ ...
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... XOR logic function. The result is a scrambled data stream with sufficient randomization to decrease radiated emissions at critical frequencies. Final Version: DM9301FP-DS-F03 June 06, 2007 100Mbps Ethernet Fiber/Twisted Pair Single Chip Media Converter TX Parallel to Serial Converter The TX Parallel to Serial converter receives parallel ...
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... TX Link Status Monitor TX Code- group Alignment Monitor 25M TPRXCLK 125M TPRXCLK NRZI Serial to Parallel Descrambler Parallel to Serial Block Diagram Figure 2 DM9301FP MLT-3 to Adaptive TPRXI+/- to NRZI EQ NRZ TX CRM Version: DM9301FP-DS-F03 Final June 06, 2007 ...
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... Therefore, the compensation or equalization must be adaptive to ensure proper conditioning of the received signal independent of the cable length. TX MLT-3 to NRZI Decoder The DM9301FP decodes the MLT-3 information from the TX Digital Adaptive Equalizer into NRZI data. TX Clock Recovery Module The TX Clock Recovery Module accepts NRZI data from the MLT-3 to NRZI decoder ...
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... Exposure to absolute maximum rating conditions for extended periods may affect device reliability. DM9301FP Max. Unit Conditions 7.0 V Non-operating 5.5 V 5.5 V °C +150 1 W °C 240 4000 V Max. Unit Conditions --- 5.25 °C 85 200 mA 5V Version: DM9301FP-DS-F03 June 06, 2007 Final ...
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... Differential Output Current PECL FX Transmitter IFD100 PECLTX+/- 100BASE-FX Mode Differential Output Current V PECL Output Voltage – High OH V PECL Output Voltage – Low OL Final Version: DM9301FP-DS-F03 June 06, 2007 100Mbps Ethernet Fiber/Twisted Pair Single Chip Media Converter (V = 5V) CC Min. Typ. 2.0 -200 2.4 1.5 2.0 │ ...
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... Ethernet Fiber/Twisted Pair Single Chip Media Converter (Over full range of operating condition unless specified otherwise) Min. Typ. 3.0 -0.5 -0.5 300 1.0 -0.5 -0.5 -50 -100 DM9301FP Max. Unit Conditions 5.0 ns 0 2.0 ns 0.5 ns 0.5 ns 300 ps 2.0 ns +50 ppm 25MHz Frequency +100 ppm 25MHz Frequency Preliminary Version: DM9301FP-DS-F03 June 06, 2007 ...
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... TX Transmit Timing Parameters Symbol Parameter t PECLRX+/- to TPTXo+/- Out ( Latency) 5-Bit Symbol 100Base-TX/FX Transmit Timing Diagram TXCLK TXD [4:0] 100TX+/- 100FX+/- Final Version: DM9301FP-DS-F03 June 06, 2007 100Mbps Ethernet Fiber/Twisted Pair Single Chip Media Converter Min Min ...
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... Ethernet Fiber/Twisted Pair Single Chip Media Converter Min. Typ Min. Typ DM9301FP Max. Unit Conditions - 90% To 10%, Into 100ohm Differential t t RXD RXD pdtxi pdfxi Max. Unit Conditions - Version: DM9301FP-DS-F03 Preliminary June 06, 2007 ...
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... MII Application Circuit: DM9301FP QFP Final Version: DM9301FP-DS-F03 June 06, 2007 100Mbps Ethernet Fiber/Twisted Pair Single Chip Media Converter (For Reference Only) DM9301FP 19 ...
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... MII Application Circuit: DM9301FP QFP place caps close to U1 pins VCC 10uf .1uf .01uf .1uf SMD-B GND Plus 5 volt D.C. input J2 L1 Ferrite Hi current VCC SMD .1uf L2 Ferrite Hi current 10uf Power Jack GND GND VCC VCC 81 R11 GND 82 10K ...
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... Dimension D 2. All dimensions are base on metric system. 3. General appearance spec should base on its final visual inspection spec. Final Version: DM9301FP-DS-F03 June 06, 2007 100Mbps Ethernet Fiber/Twisted Pair Single Chip Media Converter Dimension in mm Dimension in inch Min Nom Max Min 3 ...
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... Ethernet networking standards. Davicom America Corp 4633 Old Ironsides Dr., STE 318 Santa Clara, CA 95054, USA Tel: 408.980.9108 Fax:408.980.9236 DM9301FP Preliminary Version: DM9301FP-DS-F03 June 06, 2007 ...