V3023 EMMICRO [EM Microelectronic - MARIN SA], V3023 Datasheet - Page 8

• Manufacturer Part Number: V3023
• Description: Very Low Power 8-Bit 32 kHz RTC Module with Digital Trimming, User RAM and High Level Integration
• Manufacturer: EMMICRO [EM Microelectronic - MARIN SA]

Pin Description
SO28 Package
Functional Description
Power Supply, Data Retention and Standby
The V3023 is put in standby mode by activating the PF
input. When pulled logic low, PF will disable the input
lines, and immediately take to high impedance the lines
AD 0-7. Input states must be under control whenever PF
is deactivated.
provided, PF can be tied to the system RESET . Even in
standby the interrupt request pin IRQ will pull to ground
upon an unmasked alarm interrupt occurring.
Copyright © 2004, EM Microelectronic-Marin SA
Pin
1
2
3
4
5
6
7
8
9
10-14
15-19
20
21
22
23
24
25
26
27
28
Name
AD0
AD1
NC
AD2
AD3
V
V
AD4
NC
AD5
AD6
AD7
NC
PF
IRQ
RD
SYNC
A /D
CS
WR
SS
DD
R
If no specific power fail signal can be
Description
Time synchronization
Power fail
Bit 0 from MUX address /
data bus
Bit 1 from MUX address /
data bus
No connection
Bit 2 from MUX address /
data bus
Bit 3 from MUX address /
data bus
Address / data decode
Interrupt request
Supply ground (substrate)
Positive supply terminal
Chip select
(Motorola)
Bit 4 from MUX address /
data bus
No connection
Bit 5 from MUX address /
data bus
Bit 6 from MUX address /
data bus
Bit 7 from MUX address /
data bus
No connection
RD (Intel) or DS (Motorola)
WR (Intel) or R/ W
Table 5
PWR
GND
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
I
I
-
I
I
I
I
-
-
Initialisation
When power is first applied to the V3023 all registers have
a random value.
To initialise the V3023, software must first write a 1 to the
initialisation bit (addr. 2 bit 4) and then a 0. This sets the
Frequency Tuning bit and clears all other status bits.
The time and date parameters should then be loaded into
the RAM (addr. 20 to 28 hex) and then transferred to the
reserved clock area using the clock command followed by
a write.
The digital trimming register must then be initialised
by writing 210 (D2 hex) to it, if Frequency Tuning is
not required.
digital trimming register the frequency tuning mode
bit can be cleared.
RAM Configuration
The RAM area of the V3023 has a reserved clock and
time area, a data space, user RAM and an address
command space (see Table 9 or Fig. 7). The reserved
clock and timer area is not directly accessible to the user,
it is used for internal time keeping and contains the
current time and date plus the timer parameters.
Data Space
All locations in the data space are Read/Write. The data
space is directly accessible to the user and is divided into
five areas:
Status Registers – three registers used for status and
control data for the device (see Table 6, 7 and 8).
Digital Trimming Register – a special function described
under "Frequency Tuning".
Time and Date Registers – 9 time and date locations
which are loaded with, either the current time and date
parameters from the reserved clock area or the time and
date parameters to be transferred to the reserved clock
area.
Alarm Registers – 5 locations used for setting the alarm
parameters.
Timer Registers – 4 locations which are loaded with
either the timer parameters from the reserved timer area
or the timer parameters to be transferred to the reserved
timer area.
User RAM
The V3023 has 16 bytes of general purpose RAM
available for the users applications. This RAM block is
located at addresses 50 to 5F hex and is maintained even
in the standby mode ( PF active). The commands, or the
time set lock bit, have no effect on the user RAM block.
Reading or writing to the user RAM is similar to reading or
writing to any system RAM address.
8
After having written a value to the
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V3023