adv101 Analog Devices, Inc., adv101 Datasheet - Page 7

• Manufacturer Part Number: adv101
• Description: Cmos 80 Mhz, Triple 8-bit Video Dac
• Manufacturer: Analog Devices, Inc.

REV. B
If we, therefore, have a graphics system with a 1024 1024
resolution, a noninterlaced 60 Hz refresh rate and a retrace fac-
tor of 0.8, then:
Video Synchronization and Control
The ADV101 has a single composite video sync (SYNC) input
control. Many graphics processors and CRT controllers have
the ability of generating horizontal sync (HSYNC), vertical sync
(VSYNC) and composite SYNC.
In a graphics system which does not automatically generate a
composite SYNC signal, the inclusion of some additional logic
circuitry will enable the generation of a composite SYNC signal.
The I
IOG output, thus encoding video synchronization information
onto the green video channel. If it is not required to encode sync
information onto the ADV101, the SYNC input should be tied
to logic low and I
SYNC
Dot Rate = 1024
Dot Rate
current output is typically connected directly to the
Description
WHITE LEVEL
WHITE LEVEL
VIDEO
VIDEO to BLANK
BLACK LEVEL
BLACK to BLANK
BLANK LEVEL
SYNC LEVEL
NOTE
1
Typical with full-scale IOG = 26.67 mA. V
= 78.6 MHz
SYNC
should be connected to analog GND.
NOTES
1. OUTPUTS CONNECTED TO A DOUBLY TERMINATED 75
2. V
3. RS-343A LEVELS AND TOLERANCES ASSUMED ON ALL LEVELS.
19.05
RED, BLUE
mA
1.44
1024
0
REF
= 1.235V, R
0.714
0.054
V
0
60/0.8
26.67
mA
9.05
7.62
SET
0
IOG
(mA)
26.67
26.67
video + 9.05
video + 1.44
9.05
1.44
7.62
0
GREEN
= 560 , I
0.340
0.286
1.000
0
V
1
Figure 3. RGB Video Output Waveform
SYNC
REF
CONNECTED TO IOG.
= 1.235 V, R
92.5 IRE
7.5 IRE
40 IRE
IOR, IOB
(mA)
19.05
19.05
video + 1.44
video + 1.44
1.44
1.44
0
0
Table I. Video Output Truth Table
SET
= 560 , I
–7–
LOAD.
The required CLOCK frequency is thus 78.6 MHz.
All video data and control inputs are latched into the ADV101
on the rising edge of CLOCK, as previously described in the
“Digital Inputs” section. It is recommended that the CLOCK
input to the ADV101 be driven by a TTL buffer (e.g., 74F244).
Reference Input
An external 1.23 V voltage reference is required to drive the
ADV101. The AD589 from Analog Devices is an ideal choice of
reference. It is a two-terminal, low cost, temperature compen-
sated bandgap voltage reference which provides a fixed 1.23 V
output voltage for input currents between 50 A and 5 mA. Fig-
ure 4 shows a typical reference circuit connection diagram. The
voltage reference gets its current drive from the ADV101’s V
through an external 1 k resistor to the V
ramic capacitor is required between the COMP and V
necessary so as to provide compensation for the internal refer-
ence amplifier.
SYNC
REF
WHITE
1
0
0
0
0
0
0
0
connected to IOG.
SYNC
1
1
1
0
1
0
1
0
BLANK
1
1
1
1
1
1
0
0
WHITE LEVEL
BLACK LEVEL
BLANK LEVEL
SYNC LEVEL
DAC
Input Data
xxH
FFH
data
data
00H
00H
xxH
xxH
REF
pin. A 0.1 F ce-
ADV101
AA
. This is
AA