adv101 Analog Devices, Inc., adv101 Datasheet
adv101
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adv101 Summary of contents
Page 1
... The ADV101 is capable of generating RGB video output sig- nals, which are compatible with RS-343A and RS-170 video standards, without requiring external buffering. The ADV101 is fabricated CMOS process. Its mono- lithic CMOS construction ensures greater functionality with low power dissipation. The part is packaged in both a 0.6", 40-pin plastic DIP and a 44-pin plastic leaded (J-lead) chip carrier, PLCC ...
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... ADV101–SPECIFICATIONS Parameter All Versions Units STATIC PERFORMANCE Resolution (Each DAC) 8 Accuracy (Each DAC) Integral Nonlinearity, INL Differential Nonlinearity, DNL Gray Scale Error Coding Binary DIGITAL INPUTS Input High Voltage INH Input Low Voltage, V 0.8 INL Input Current Input Capacitance, C ...
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... DATA ) SYNC t ) MEASURED FROM THE 50% POINT OF THE RISING EDGE MEASURED FROM THE 50% POINT OF FULL-SCALE MEASURED BETWEEN THE 10% AND 90% POINTS 7 Figure 1. Video Input/Output Timing –3– ADV101 = 37 pF 560 . L L SET unless otherwise noted.) MIN MAX Units Conditions/Comments ...
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... ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the ADV101 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality ...
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... IOR and IOB is given by: SET (V)/ R IOR, IOB (mA) = 8,628 V REF . 5%). All V pins on the ADV101 must be connected. AA –5– does not output any current while SYNC is SYNC should be connected to AGND. SYNC is connected to IOG) SYNC ( ) SET ADV101 ...
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... All these digital inputs are specified to accept TTL logic levels Clock Input The CLOCK input of the ADV101 is typically the pixel clock rate of the system also known as the dot rate. The dot rate and hence the required CLOCK frequency, will be determined by the on-screen resolution, according to the following equation ...
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... The required CLOCK frequency is thus 78.6 MHz. All video data and control inputs are latched into the ADV101 on the rising edge of CLOCK, as previously described in the “Digital Inputs” section recommended that the CLOCK input to the ADV101 be driven by a TTL buffer (e.g., 74F244). GREEN V 1.000 92 ...
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... In this case, I connected to IOG. (See “Video Synchronization and Control” section.) The red, green and blue analog outputs of the ADV101 are high impedance current sources. Each one of these three RGB cur- rent outputs is capable of directly driving a 37.5 a doubly terminated 75 coaxial cable ...
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... TERMINATION) REV. B Video Output Buffers The ADV101 is specified to drive transmission line loads, which is what most monitors are rated as. The analog output configu- rations to drive such loads are described in the Analog Interface section and illustrated in Figure 5. However, in some applica- tions it may be required to drive long “transmission line” cable lengths ...
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... PC board layout. Figure 8 shows a recommended connection diagram for the ADV101. The layout should be optimized for lowest noise on the ADV101 power and ground lines. This can be achieved by shielding the digital inputs and providing good decoupling. The lead length between groups of V ...
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... For optimum performance, the analog outputs should each have a source termination resistance to ground of 75 terminated 75 should be individually should be as close as possible to the ADV101 minimize AA reflections. Additional information on PCB design is available in an applica- tion note entitled “Design and Layout of a Video Graphics Sys- tem for Reduced EMI.” ...
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... ADV101 OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 44-Terminal Plastic Leaded Chip Carrier (P-44A) 40-Pin Plastic DIP (N-40A) –12– REV. B ...