alc880 Realtek Semiconductor Corporation, alc880 Datasheet - Page 28

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alc880

Manufacturer Part Number
alc880
Description
7.1 Channel High Definition Audio Codec
Manufacturer
Realtek Semiconductor Corporation
Datasheet

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7.3.2.
A ‘Codec Reset’ is initiated via the Codec RESET command verb. It results in the target codec being
reset to the default state. After the target codec completes its reset operation, an initialization sequence is
requested.
7.3.3.
controller
7.1 Channel High Definition Audio Codec
SYNC
BCLK
Exit from Reset
RST#
SDIx
The codec drives SDI high at the last bit of SYNC to request a Codec Address (CAD) from the
The codec will stop driving the SDI during this turnaround period
The controller releases the SDI after the CAD has been assigned
Normal operation state
The controller drives SDI to assign a CAD to the codec
Codec Reset
Codec Initialization Sequence
Connection Frame
Frame SYNC
Drives SDIx
Codec
1
Turnaround
(477 BCLK
2
Codec
Max.)
Figure 14. Codec Initialization Sequence
(Non-48kHz Frame)
Turnaround Frame
3
Frame SYNC
Controller Drives SDIx
18
SD0 SD1
4
5
(Non-48kHz Frame)
SD14
Address Frame
6
Turnaround
(477 BCLK
Controller
Max.)
7
Track ID: JATR-1076-21
8
Frame SYNC
Codec Drives SDIx
ALC880 Series
Normal Operation
Datasheet
Response
Rev. 1.4

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