alc880 Realtek Semiconductor Corporation, alc880 Datasheet - Page 26

• Manufacturer Part Number: alc880
• Description: 7.1 Channel High Definition Audio Codec
• Manufacturer: Realtek Semiconductor Corporation

44.1kHz
88.2kHz
174.4kHz
7.3. Reset and Initialization
There are two types of reset within an HDA link:
• Link Reset.
• Codec Reset.
An initialization sequence is requested after any of the following three events:
1.
2.
3.
7.3.1.
A link reset may be caused by any of the following three events:
1.
2.
3.
7.1 Channel High Definition Audio Codec
Generated by assertion of the RST# signal. All codecs return to their power-on state
Generated by software directing a command to reset a specific codec back to its default state
Link Reset
Codec Reset
Codec changes its power state, e.g., hot docking a codec to an HDA system
The HDA controller asserts RST# for any reason (power up, or PCI reset)
Software initiates a link reset via the ‘CRST’ bit in the Global Control Register (GCR) of the HDA
controller
Software initiates power management sequences. Figure 13, page 17, shows the ‘Link Reset’ timing
including the ‘Enter’ sequence ( ~ ) and ‘Exit’ sequence ( ~ )
Link Reset
12- =Contiguous 12 frames containing 1 sample blocks each, followed by one frame with
no sample block.
12
no sample block.
12
no sample block.
2
4
- =Contiguous 12 frames containing 2 sample blocks each, followed by one frame with
- =Contiguous 12 frames containing 4 sample blocks each, followed by one frame with
16
Track ID: JATR-1076-21
ALC880 Series
Datasheet
Rev. 1.4