x24f064 Intersil Corporation, x24f064 Datasheet

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x24f064

Manufacturer Part Number
x24f064
Description
Serialflash Tm Memory With Block Lock Tm Protection
Manufacturer
Intersil Corporation
Datasheet
64K/32K/16K
FUNCTIONAL DIAGRAM
SerialFlash Memory and Block Lock
Protection are trademarks of Xicor, Inc.
FEATURES
6686-3.8 8/29/96 T3/C0/D0 SH
Xicor, 1995, 1996 Patents Pending
1.8V to 3.6V or 5V “Univolt” Read and
Program Power Supply Versions
Low Power CMOS
—Active Read Current Less Than 1mA
—Active Program Current Less Than 3mA
—Standby Current Less Than 1 A
Internally Organized 8K/4K/2K x 8
New Programmable Block Lock Protection
—Software Write Protection
—Programmable hardware Write Protect
Block Lock (0, 1/4, 1/2, or all of the Flash
Memory array)
2 Wire Serial Interface
Bidirectional Data Transfer Protocol
32 Byte Sector Programming
Self Timed Program Cycle
High Reliability
—Endurance: 100,000 cycles per byte
—Data Retention: 100 Years
Available Packages
—8-Lead PDIP
—8-Lead SOIC (JEDEC)
—14-Lead TSSOP (X24F032/016)
—20-Lead TSSOP (X24F064)
—Typical Programming Time of 5ms
Per Sector
AN76 • AN78 • AN81 • AN87
A V A I L A B L E
A
PPLICATION
SerialFlash
N
OTE
S
S
S
SDA
SCL
TM
0
2
1
/S
/S
PP
/S
0
2
1
Memory with Block Lock
X24F064/032/016
AND CONTROL
COMMAND
DECODE
LOGIC
CONTROL LOGIC
PROGRAMMING
1
DESCRIPTION
The X24F064/032/016 is a CMOS SerialFlash
Memory Family, internally organized 8K/4K/2K x 8.
The family features a serial interface and software
protocol allowing operation on a simple two wire bus.
Device select inputs (S
devices to share a common two wire bus.
A Program Protect Register accessed at the highest
address location, provides three new programming
protection features: Software Programming Protection,
Block Lock Protection, and Hardware Programming
Protection. The Software Programming Protection
feature prevents any nonvolatile writes to the device
until the WEL bit in the program protect register is set.
The Block Lock
individually protect four blocks of the array by program-
ming two bits in the programming protect register. The
Programmable Hardware Program Protect feature
allows the user to install each device with PP tied to
V
then enable the hardware programming protection by
programming a PPEN bit in the program protect
register. After this, selected blocks of the array,
including the program protect register itself, are
permanently protected from being programmed.
CC
, program the entire memory array in place, and
PROGRAM
REGISTER
PROTECT
DECODE
LOGIC
X
TM
TM
Protection feature allows the user to
Protection
SECTOR DECODE LOGIC
0
Characteristics subject to change without notice
, S
8K/4K/2K x 8 Bit
32
DATA REGISTER
HIGH VOLTAGE
1
SECTORED
CONTROL
, S
MEMORY
ARRAY
2
) allow up to eight
6686 ILL F01.5
8

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x24f064 Summary of contents

Page 1

... T3/C0/D0 SH X24F064/032/016 TM Memory with Block Lock DESCRIPTION The X24F064/032/016 is a CMOS SerialFlash Memory Family, internally organized 8K/4K/ The family features a serial interface and software protocol allowing operation on a simple two wire bus. Device select inputs (S devices to share a common two wire bus. ...

Page 2

... Program Protect (PP) The program protect input controls the hardware program protect feature. When held LOW, hardware program protection is disabled and the X24F064/ 032/016 can be programmed normally. When this input is held HIGH, and the PPEN bit in the program protect register is set HIGH, program ...

Page 3

... X24F064/032/016 DEVICE OPERATION The X24F064/032/016 supports a bidirectional bus ori- ented protocol. The protocol defines any device that sends data onto the bus as a transmitter, and the re- ceiving device as the receiver. The device controlling the transfer is a master and the device being controlled is the slave ...

Page 4

... X24F064/032/016 will respond with an acknowledge after the receipt of each subsequent eight-bit word. In the read mode the X24F064/032/016 will transmit eight bits of data, release the SDA line and monitor the line for an acknowledge acknowledge is detected and no stop condition is generated by the master, the X24F064/032/016 will continue to transmit data ...

Page 5

... Upon a correct comparison of the device select inputs, the X24F064/032/016 outputs an acknowledge on the SDA line. Depending on the state A9 A8 R/W of the R/W bit, the X24F064/032/016 will execute a read or program operation. PROGRAMMING OPERATIONS The X24F064/032/016 offers a 32-byte sector pro R/W gramming operation ...

Page 6

... X24F064/032/016 Flow 1. ACK Polling Sequence PROGRAM OPERATION COMPLETED ENTER ACK POLLING ISSUE START ISSUE SLAVE ADDRESS AND R ACK NO RETURNED? YES NEXT NO OPERATION A WRITE? YES ISSUE SECTOR ADDRESS PROCEED After the receipt of each byte, the five low order ad- dress bits are internally incremented by one. The high order bits of the sector address remain constant ...

Page 7

... R/W bit set HIGH. This will be followed by an acknowledge from the X24F064/032/016 and then by the eight-bit byte. The read operation is terminated by the master; by not re- sponding with an acknowledge and by issuing a stop condition ...

Page 8

... At the end of the address space, the counter “rolls over” and the X24F064/032/016 continues to output data for each acknowledge received. Refer to Figure 8 for the address, acknowledge and data transfer sequence. ...

Page 9

... X24F064/032/016 PROGRAM PROTECT REGISTER The Program Protect Register (PPR) is accessed at the highest address of each device: X24F064 = 1FFF X24F032 = 0FFF X24F016 = 07FF Figure 10. Program Protect Register PPEN 0 0 BL1 BL0 PPR.1 = WEL – Write Enable Latch (Volatile Write enable latch reset, programming disabled 1 = Write enable latch set, programming enabled If WEL = 0 then “ ...

Page 10

... X24F064/032/016 Block Lock Bits The Block Lock Bits BL0 and BL1 determine which blocks of the memory are write-protected: Table 1. Block Lock Bits BL1 BL0 Array Locked 0 0 None 0 1 Upper 1 Upper 1 Full Array (WPR not included) Table 2. Program Protect Status Table ...

Page 11

... X24F064/032/016 ABSOLUTE MAXIMUM RATINGS* Temperature Under Bias X24F064/032/016 ...................... – +135 C Storage Temperature........................ – +150 C Voltage on any Pin with Respect to V .................................... –1V to +7V SS D.C. Output Current..............................................5mA Lead Temperature (Soldering, 10 Seconds)...... 300 C RECOMMENDED OPERATING CONDITIONS Temperature Min. Commercial 0 C Extended –20 C Industrial – ...

Page 12

... X24F064/032/016 A.C. CONDITIONS OF TEST Input Pulse Levels V CC Input Rise and Fall Times Input and Output Timing Levels A.C. OPERATING CHARACTERISTICS (Over the recommended operating conditions, unless otherwise specified.) Read & Write Cycle Limits Symbol f SCL Clock Frequency SCL T Noise Suppression Time I Constant at SCL, SDA Inputs ...

Page 13

... BUS CAPACITANCE (pF) t HIGH t LOW HD:STA t HD:DAT t SU:DAT Min. Typ. X24F064/032/016 bus interface circuits are disabled, SDA is allowed to remain HIGH, and the device does not respond to its slave address. ACK t WR STOP CONDITION SYMBOL TABLE WAVEFORM 6686 ILL F19.1 13 ...

Page 14

... X24F064/032/016 PACKAGING INFORMATION 8-LEAD PLASTIC DUAL IN-LINE PACKAGE TYPE P HALF SHOULDER WIDTH ON ALL END PINS OPTIONAL 0.015 (0.38) MAX. TYP. 0.010 (0.25) NOTE: 1. ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS) 2. PACKAGE DIMENSIONS EXCLUDE MOLDING FLASH 0.430 (10.92) 0.360 (9.14) PIN 1 INDEX PIN 1 0.300 (7.62) REF. SEATING PLANE 0.150 (3.81) ...

Page 15

... X24F064/032/016 PACKAGING INFORMATION 8-LEAD PLASTIC SMALL OUTLINE GULL WING PACKAGE TYPE S PIN 1 INDEX 0.010 (0.25) 0.020 (0.50) 0 – 8 0.016 (0.410) 0.037 (0.937) NOTE: ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS) 0.150 (3.80) 0.158 (4.00) PIN 1 0.014 (0.35) 0.019 (0.49) 0.188 (4.78) 0.197 (5.00) (4X) 7 0.004 (0.19) 0.050 (1.27) 0.010 (0.25 0.0075 (0.19) 0.250" 0.010 (0.25) ...

Page 16

... X24F064/032/016 PACKAGING INFORMATION See Detail “A” NOTE: ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS) 14-LEAD PLASTIC, TSSOP PACKAGE TYPE V .025 (.65) BSC .169 (4.3) .177 (4.5) .193 (4.9) .200 (5.1) .0075 (.19) .002 (.05) .0118 (.30) .006 (.15) .010 (.25) 0 – 8 .019 (.50) .029 (.75) Detail A (20X) 16 .252 (6.4) BSC .047 (1.20) Gage Plane Seating Plane ...

Page 17

... X24F064/032/016 PACKAGING INFORMATION 20-LEAD PLASTIC, TSSOP PACKAGE TYPE V 0 – 8 See Detail “A” NOTE: ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS) .025 (.65) BSC .169 (4.3) .252 (6.4) BSC .177 (4.5) .252 (6.4) .300 (6.6) .047 (1.20) .0075 (.19) .002 (.05) .0118 (.30) .006 (.15) .010 (.25) Gage Plane Seating Plane .019 (.50) .029 (.75) Detail A (20X) ...

Page 18

... Range CC Blank = 1. 4.5V to 5.5V Temperature Range Blank = Commercial = + Extended = – + Industrial = – +85 C Package X24F064 P = 8-Lead Plastic DIP S = 8-Lead SOIC (JEDEC 20-Lead TSSOP 8-Lead Plastic DIP Blank = 8-Lead SOIC (JEDEC 14/20-Lead TSSOP X Blank = 1.8V to 3.6V + 1.8V to 3.6V, – ...

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