32C87 RENESAS [Renesas Technology Corp], 32C87 Datasheet - Page 77

• Manufacturer Part Number: 32C87
• Description: RENESAS MCU
• Manufacturer: RENESAS [Renesas Technology Corp]

M32C/87 Group (M32C/87, M32C/87A, M32C/87B)
REJ03B0127-0151 Rev.1.51 Jul 31, 2008
Page 77 of 85
Timing Requirements
(VCC1 = VCC2 = 3.0 to 3.6 V, VSS = 0 V, Topr = -20 to 85°C unless otherwise specified)
Table 5.51
NOTE:
tac1(RD-DB)
tac1(AD-DB)
tac2(RD-DB)
tac2(AD-DB)
tsu(DB-BCLK)
tsu(RDY-BCLK)
tsu(HOLD-BCLK)
th(RD-DB)
th(BCLK-RDY)
th(BCLK-HOLD)
td(BCLK-HLDA)
1. Values, which depend on BCLK frequency and external bus cycles, can be obtained from the following
Symbol
equations. Insert wait states or lower the operation frequency, f(BCLK), if the calculated value is negative.
tac1(RD-DB) =
tac1(AD-DB) =
tac2(RD-DB) =
tac2(AD-DB) =
Memory Expansion Mode and Microprocessor Mode
Data input access time (RD standard)
Data input access time (AD standard, CS standard)
Data input access time (RD standard, when accessing a space with the
multiplexed bus)
Data input access time (AD standard, when accessing a space with the
multiplexed bus)
Data input setup time
RDY input setup time
HOLD input setup time
Data input hold time
RDY input hold time
HOLD input hold time
HLDA output delay time
f(BCLK) × 2
f(BCLK) × 2
f(BCLK) × 2
10
10
10
10
f(BCLK)
9
9
9
9
× m
× n
× m
× p
- 35 [ns] (if external bus cycle is a φ + b φ , m = (b × 2) + 1)
- 35 [ns] (if external bus cycle is a φ + b φ , n = a + b)
- 35 [ns] (if external bus cycle is a φ + b φ , m = (b × 2) - 1)
- 35 [ns] (if external bus cycle is a φ + b φ , p = {(a + b - 1) × 2} + 1)
Parameter
VCC1 = VCC2 = 3.3 V
5. Electrical Characteristics
Min.
30
40
60
0
0
0
Standard
(note 1)
(note 1)
(note 1)
(note 1)
Max.
25
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns