saa2520 NXP Semiconductors, saa2520 Datasheet - Page 10
saa2520
Manufacturer Part Number
saa2520
Description
Stereo Filter And Codec For Mpeg Layer 1 Audio Applications
Manufacturer
NXP Semiconductors
Datasheet
1.SAA2520.pdf
(36 pages)
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Philips Semiconductors
Baseband Interface Signals
The interface between the SAA2520 and the baseband input/output circuitry consists of the following signals:
The SWS signal indicates the channel of the sample signal
(either LEFT or RIGHT) and is equal to the sampling
frequency FS.
Operating at a frequency of 64 times that is used for
sampling, the bit clock dictates that each SWS period
contains 64 SDA data bits. Of these, a maximum of 36 are
used to transfer data (samples may have a length up to
18-bits). Samples are transferred most significant bit first.
Both SWS and SDA change state at the negative edge of
SCL.
This baseband data is transferred between the SAA2520
and the input/output using either Standard I
the alternative format shown in Fig.8.
August 1993
SWS
SCL
SDA
FDIR
Stereo filter and codec for MPEG layer 1
audio applications
bi-directional
bi-directional
bi-directional
output
SWS
FSYNC
sub-band
channel
L
31
R
Fig.10 SWS related to phase of FSYNC.
2
L
S (default) or
0
word (channel) select
bit clock
baseband data
decoding mode (direction control)
R
L
1
R
10
L
R
L
31
R
L
FS
64FS
0
R
L
MBC148 - 1
1
Preliminary specification
R
SAA2520
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