hy5ps1g831lf Hynix Semiconductor, hy5ps1g831lf Datasheet - Page 23

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hy5ps1g831lf

Manufacturer Part Number
hy5ps1g831lf
Description
1gb Ddr2 Sdram
Manufacturer
Hynix Semiconductor
Datasheet
Rev. 1.2 / Dec 2006
General notes, which may apply for all AC parameters
1. Slew Rate Measurement Levels
2. DDR2 SDRAM AC timing reference load
the part. It is not intended to be either a precise representation of the typical system environment nor a depic-
tion of the actual load presented by a production tester. System designers will use IBIS or other simulation
tools to correlate the timing reference load to a system environment. Manufacturers will correlate to their pro-
duction test conditions (generally a coaxial transmission line terminated at the tester electronics).
The output timing reference voltage level for single ended signals is the crosspoint with VTT. The output tim-
ing reference voltage level for differential signals is the crosspoint of the true (e.g. DQS) and the complement
(e.g. DQS) signal.
3. DDR2 SDRAM output slew rate test load
4. Differential data strobe
DDR2 SDRAM pin timings are specified for either single ended mode or differential mode depending on the
setting of the EMRS “Enable DQS” mode bit; timing advantages of differential mode are realized in system
design. The method by which the DDR2 SDRAM pin timings are measured is mode dependent. In single
The following figure represents the timing reference load used in defining the relevant timing parameters of
a. Output slew rate for falling and rising edges is measured between VTT - 250 mV and VTT + 250 mV for
b. Input slew rate for single ended signals is measured from dc-level to ac-level: from VREF - 125 mV to
c. VID is the magnitude of the difference between the input voltage on CK and the input voltage on CK, or
Output slew rate is characterized under the test conditions as shown below.
single ended signals. For differential signals (e.g. DQS - DQS) output slew rate is measured between
DQS - DQS = -500 mV and DQS - DQS = +500mV. Output slew rate is guaranteed by design, but is not
necessarily tested on each device.
between DQS and DQS for differential strobe.
VREF + 250 mV for rising edges and from VREF + 125 mV and VREF - 250 mV for falling edges.
For differential signals (e.g. CK - CK) slew rate for rising edges is measured from CK - CK = -250 mV to
CK - CK = +500 mV
VDDQ
VDDQ
DUT
DUT
RDQS, RDQS
DQS, DQS
(250mV to -500 mV for falling egdes).
AC Timing Reference Load
Slew Rate Test Load
RDQS
RDQS
DQS
DQS
DQ
DQ
Output
Output
Test point
Timing
reference
point
25
25
Ω
Ω
V
V
TT
TT
= V
= V
DDQ
DDQ
1HY5PS1G431(L)F
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