hy5ps1g831lf Hynix Semiconductor, hy5ps1g831lf Datasheet - Page 11

• Manufacturer Part Number: hy5ps1g831lf
• Description: 1gb Ddr2 Sdram
• Manufacturer: Hynix Semiconductor

Rev. 1.2 / Dec 2006
3.2 DC & AC Logic Input Levels
3.2.1 Input DC Logic Leve
3.2.2 Input AC Logic Level
3.2.3 AC Input Test Conditions
Notes:
1.
2.
3.
V
V
SLEW
REF
SWING(MAX)
Input waveform timing is referenced to the input signal crossing through the V
The input signal minimum slew rate is to be maintained over the range from V
from V
AC timings are referenced with input waveforms switching from VIL(ac) to VIH(ac) on the positive transitions and VIH(ac) to
VIL(ac) on the negative transitions.
Symbol
Symbol
Symbol
V
V
V
V
IH
IH
IL
IL
(dc)
(dc)
(ac)
(ac)
REF
V
Falling Slew =
SWING(MAX)
to V
IL(ac)
dc input logic high
dc input logic low
ac input logic high
ac input logic low
Input reference voltage
Input signal maximum peak to peak swing
Input signal minimum slew rate
max for falling edges as shown in the below figure.
delta TF
V
Parameter
Parameter
REF
delta TF
< Figure : AC Input Test Signal Waveform>
- V
IL(ac)
Condition
l
max
V
V
REF
REF
Min.
- 0.3
Min.
+ 0.125
+ 0.250
-
delta TR
Rising Slew =
0.5 * V
1.0
1.0
V
V
V
REF
REF
DDQ
REF
REF
Max.
Max.
Value
- 0.125
-
- 0.250
DDQ
level applied to the device under test.
+ 0.3
to V
IH(ac)
V
min for rising edges and the range
IH(ac)
V
V
V/ns
delta TR
1HY5PS1G431(L)F
1HY5PS1G831(L)F
Units
Units
min - V
Units
V
V
V
V
V
V
V
V
V
V
V
DDQ
IH(ac)
IH(dc)
REF
IL(dc)
IL(ac)
SS
REF
max
max
min
min
1
1
2, 3
Notes
Notes
Notes
11