lc86p7148 Sanyo Semiconductor Corporation, lc86p7148 Datasheet
lc86p7148
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lc86p7148 Summary of contents
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... LC86P7148 can be checked the functions of the trial pieces using the mass production board. (2) Internal one-time PROM capacity : 49152 bytes (3) Internal RAM capacity Used PROM or RAM capacity are equal ROM or RAM capacity of mask ROM version which applies LC86P7148. Mask ROM version LC867148 ...
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... Refer to ‘electrical characteristics’ on the semiconductor news. [ IOAL(2)] [ IOAL(3)] Power dessipation LC86P7148 uses 256 bytes that is addressed on 0FF00H to FFFFH in the program memory as the option configuration data area. This option configuration can execute all options which LC867100 series have. correspond and not correspond to LC86P7148. ...
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... The option data is created by the option specified program “SU86K.EXE”. program area by linkage loader “L86K.EXE”. (3) ROM space LC86P7148 and LC867100 series use 256 bytes that is addressed on 0FF00H to 0FFFFH in the program memory as the option specified data area. These program memory capacity are 49152 bytes that is addressed on 0000H to 0BFFFH. ...
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... How to program for the EPROM The LC86P7148 can be programmed by EPROM programmer with attachment ; W86EP7148Q • Recommended EPROM programmer Advantest Minato electronics • ...
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... Package Dimension (unit : mm) 3174 Notes •The QFP packages should be heat-soaked for 12 hours at 125 C immediately prior to mounting (This baking is called pre-baking). •After pre-baking a controlled environment must be maintained until soldering. temperature less and a humidity level of 70% or less. LC86P7148 ...
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... SIO0 SIO1 Timer 0 Timer 1 Real Time Service RAM 128 bytes LCD Controller S0 – S7 (PA) S8 – S13 (PB) S16 – S23 (PC) S24 – S31 (PD) COM0 – COM3(PL) LC86P7148 IR PROM Control Bus Interface Port 1 Port 7 Port 8 Port 9 ADC INT0 - 3 Nose Filter DAC PLA A15-A0 ...
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... P80 – P87 • Other function AD input port (8 port pins) PORT9 I/O • 4-bit input/output port P90 - P93 • Other function DA output port (4 port pins) AD input port (4 port pins) LC86P7148 Option - - - - - - • Pull-up resistor : Provided/Not provided (specified in nibble units) • ...
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... The VSS1, VSS2 and VSS3 terminals must be shorted electrically each other. *1 Connect like the following figure to reduce noise into a VDD terminals. Power Supply *2 Memory select input for data security *3 Output enable input *4 Chip enable input * PROM control signal input LC86P7148 Option - - - - - - ...
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... Notes •The QFP packages should be heat-soaked for 12 hours at 125 C immediately prior to mounting (This baking is called pre-baking). •After pre-baking a controlled environment must be maintained until soldering. temperature less and a humidity level of 70% or less. LC86P7148 Pins Conditions VDD1=VDD2= VDD3 VDD1=VDD2= ...
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... VIL(3) •Port 70 Port input/interrupt •Port 71 • RES VIL(4) Port 70 Watchdog timer VIL(5) •Port 8 •Ports Operation tCYC cycle time LC86P7148 Pins Conditions VDD[V] 0.98 s tCYC 400 s 3.9 s tCYC 400 s RAMs and the registers hold voltage at HOLD mode. Output disable Output disable Output N-channel Tr ...
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... FsXtal XT1, XT2 Oscillation tmsCF(1) CF1, CF2 stabilizing time period (Note 1) tmsCF(2) CF1, CF2 tssXtal XT1, XT2 (Note 1) The oscillation constant is shown on table 1 and table 2. LC86P7148 Pins Conditions VDD[V] •6MHz 4.5-6.0 (ceramic resonator oscillation) •Refer to figure 1 •3MHz 4.5-6.0 (ceramic resonator oscillation) •Refer to figure 1 RC oscillation 4 ...
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... Output low VOL(1) Ports 0, 1 voltage VOL(2) VOL(3) Port 70 VOL(4) Port 9 VOL(5) VOL(6) Ports CMOS output VOL(7) LC86P7148 Conditions •Output disable •Pull-up MOS Tr. OFF. VIN=VDD (including the off- leak current of the output Tr.) VIN=VDD VIN=VDD VIN=VDD VIN=VDD Using as port ,75 VIN=VDD • ...
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... Data set up time tICK Data hold time tCKI Output delay time tCKO(1) (Serial clock is external clock) Output delay time tCKO(2) (Serial clock is internal clock) LC86P7148 Pins Conditions •Deference voltage to ideal value •VLCD, 2/3VLCD, 1/3VLCD •Deference voltage to ideal value •VLCD, 2/3VLCD, 1/2VLCD, 1/3VLCD Resistance at a ladder resistor • ...
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... IAINH input current IAINL (Note 2) Absolute precision excepts quantizing error (±1/2 LSB). (Note 3) The conversion time means the time from executing the AD conversion instruction to setting the complete digital conversion value to the register. LC86P7148 Pins Conditions •Interrupt acceptable •Timer0-countable •Interrupt acceptable •Timer0-countable • ...
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... DA data = 80H 8. Current Dissipation Characteristics at Ta=- +70 C, VSS=VSS1=VSS2=VSS3=0V Parameter Symbol Current dissipation IDDOP(1) during basic operation (Note 6) IDDOP(2) IDDOP(3) IDDOP(4) LC86P7148 Pins Conditions 8 bit mode 9 bit mode 9.5 bit mode (Note 4) 8 bit mode 9 bit mode (1) 9 bit mode (2) 9.5 bit mode (Note 5) ...
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... HALT mode (Note 6) IDDHALT(2) IDDHALT(3) IDDHALT(4) IDDHALT(5) Current dissipation IDDHOLD(1) in HOLD mode (Note 6) (Note 6) The currents of the output transistors and the pull-up MOS transistors are ignored. LC86P7148 Pins Conditions VDD1= •HALT mode VDD2= •FmCF=6MHz VDD3 Ceramic resonator oscillation •FsXtal=32.768kHz crystal oscillation • ...
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... CF1 CF C1 Figure 1 Ceramic oscillation circuit LC86P7148 Maker Oscillator Murata CSA6.00MG CST6.00MGW Kyocera KBR-6.0MSA PBRC6 ...
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... HOLD release signal Internal RC resonator oscillation CF1, CF2 XT1, XT2 Operation mode HOLD <HOLD release signal and oscillation stable time> Figure 3 LC86P7148 Reset time tmsCF tssXtal Instruction Reset execution mode Instruction execution mode OCR6=1 Valid ...
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... LC86P7148 VDD R RES RES C RES Figure 4 <AC timing point> tCKCY tCKL SCK0 SCK1 tICK SI0 SI1 tCKO SO0, SO1 SB0, SB1 <Timing> Figure 5 Serial input / output test condition tPIL Figure 6 Pulse input timing condition (Note) Fix the value of CRES, RRES that is sure to reset until 200 s, after Power supply has been over inferior limit of supply voltage ...
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... Writing data for program/Verifying Recommended process of screening Heat-soak +1 150± Reading ascertain of program VDD=5±0.5V Baking before mounting 125 C, 12 hours Baking Mounting LC86P7148 b. Shipping with a programmed PROM (Programming the data by Sanyo) QFP Baking before mounting 125 C, 12 hours Baking Mounting No.6692-20/21 ...
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... LC86P7148 No.6692-21/21 PS ...