ST16C2552CJ44 EXAR [Exar Corporation], ST16C2552CJ44 Datasheet - Page 35

• Manufacturer Part Number: ST16C2552CJ44
• Description: 2.97V TO 5.5V DUAL UART WITH 16-BYTE FIFO
• Manufacturer: EXAR [Exar Corporation]

REV. 4.2.1
GENERAL DESCRIPTION................................................................................................. 1
PIN DESCRIPTIONS ......................................................................................................... 3
1.0 Product DESCRIPTION ........................................................................................................... 6
2.0 FUNCTIONAL DESCRIPTIONS ............................................................................................... 7
3.0 UART INTERNAL REGISTERS ............................................................................................. 15
4.0 INTERNAL Register descriptions ........................................................................................ 16
F
F
F
T
T
T
T
F
F
F
T
F
F
F
F
F
T
T
T
T
IGURE
IGURE
IGURE
ABLE
ABLE
ABLE
ABLE
IGURE
IGURE
IGURE
ABLE
IGURE
IGURE
IGURE
IGURE
IGURE
ABLE
ABLE
ABLE
ABLE
A
F
ORDERING INFORMATION
2.1 CPU I
2.2 D
2.3 C
2.4 C
2.5 S
2.6 DMA M
2.7 INTA
2.8 C
2.9 P
2.10 T
2.11 R
2.12 I
4.1 R
4.2 T
4.3 B
4.4 I
4.5 I
4.6 FIFO C
4.7 L
EATURES
PPLICATIONS
1: C
2: TXRDY#
3: INTA
4: INTA
5: T
6: UART CHANNEL A AND B UART INTERNAL REGISTERS ............................................................................................. 15
7: INTERNAL REGISTERS DESCRIPTION........................................................................................................................... 16
8: I
9: T
2.10.1 Transmit Holding Register (THR) - Write Only ....................................................................................... 11
2.10.2 Transmitter Operation in non-FIFO Mode .............................................................................................. 11
2.10.3 Transmitter Operation in FIFO Mode ..................................................................................................... 12
2.11.1 Receive Holding Register (RHR) - Read-Only ....................................................................................... 13
4.4.1 IER versus Receive FIFO Interrupt Mode Operation ............................................................................... 17
4.4.2 IER versus Receive/Transmit FIFO Polled Mode Operation.................................................................... 17
4.5.1 Interrupt Generation: ................................................................................................................................ 18
4.5.2 Interrupt Clearing: .................................................................................................................................... 18
NTERRUPT
NTERRUPT
1. ST16C2552 B
2. P
3. ST16C2552 D
4. T
5. E
6. O
7. T
8. T
9. R
10. R
11. I
INE
RANSMIT
IMULTANEOUS
ROGRAMMABLE
AUD
EVICE
HANNEL
HANNEL
RYSTAL
ECEIVE
NTERRUPT
NTERNAL
RANSMITTER
ECEIVER
YPICAL DATA RATES WITH A
RANSMIT AND
HANNEL
YPICAL OSCILLATOR CONNECTIONS
RANSMITTER
RANSMITTER
IN
XTERNAL
ECEIVER
PERATING
NTERNAL
C
ECEIVER
AND
R
O
NTERFACE
AND
AND
ONTROL
.................................................................................................................................................. 1
UT
ONTROL
ODE
ATE
R
H
O
ESET
AND
A
A
A
............................................................................................................................................. 1
A
INTB P
INTB P
H
INTB O
OLDING
S
O
SSIGNMENT
SCILLATOR OR
E
S
C
AND
L
L
AND
AND
....................................................................................................................................... 12
OLDING
G
O
OURCE AND
F
........................................................................................................................................ 8
PERATION IN NON
LOCK
OOP
NABLE
TATUS
OOPBACK
RXRDY# O
REQUENCY
PERATION IN
ENERATOR
R
O
O
LOCK
R
.................................................................................................................................... 7
B S
ECEIVE
ATA
W
PERATION IN NON
PERATION IN
................................................................................................................................. 11
R
INS
IN
B S
B I
B
B
EGISTER
................................................................................................................................. 7
C
EGISTER
RITE TO
ACK IN
ELECT
UPUTS
O
AUD
R
ONNECTION FOR
D
B
NTERNAL
O
R
R
PERATION
R
............................................................................................................................................................. 2
US
EGISTER
IAGRAM
............................................................................................................................. 2
ELECTION
PERATION FOR
FIFO T
EGISTER
EGISTER
EGISTER
P
C
I
UTPUTS IN
R
RIORITY
....................................................................................................................................................... 7
NTERCONNECTIONS
..................................................................................................................... 14
C
HART
FIFO M
ATE
14.7456 MH
HANNEL
D
.................................................................................................................... 9
(LCR) - R
E
FIFO M
C
-FIFO M
................................................................................................................................................. 1
IVISORS
(FCR) - W
RIGGER
XT
HANNEL
F
. R
R
G
OR
-FIFO M
(RHR) - R
L
. C
ODE
(IER) - R
(ISR) - R
(THR) - W
EGISTERS
............................................................................................................ 7
ENERATOR
EQUIRES A
EVEL
TABLE OF CONTENTS
........................................................................................................................................ 9
FIFO
A
R
E
ODE
T
LOCK
XTENDED
ODE
ECEIVER
AND
L
RANSMITTER
................................................................................................................................. 13
(DLL
............................................................................................................................... 18
EVEL
Z CRYSTAL OR EXTERNAL CLOCK
EAD
............................................................................................................................. 12
A
ODE
AND
........................................................................................................................... 13
B........................................................................................................................ 14
RITE
AND
I
......................................................................................................................... 7
NPUT
S
...................................................................................................................... 12
EAD
EAD
EAD
/W
2K
DMA M
....................................................................................................................... 9
ELECTION
AND
D
RITE
............................................................................................ 8
-O
......................................................................................... 10
ATA
RITE
OHMS PULL
B ...................................................................................... 8
/W
-O
- O
................................................................................................................ 9
NLY
...................................................................................... 9
DLM) - R
-O
R
NLY
ODE
RITE
NLY
ATE
................................................................................ 20
NLY
..................................................................................................... 19
............................................................................... 19
I
.................................................................................................... 8
................................................................................................. 10
............................................................................ 18
........................................................................... 16
-
.......................................................................... 17
UP RESISTOR ON
2.97V TO 5.5V DUAL UART WITH 16-BYTE FIFO
......................................................................... 16
EAD
/W
.............................................................................. 11
RITE
XTAL2
................................................... 17
PIN TO INCREASE OPERATING SPEED
ST16C2552
. 10