mh89760b Mitel, mh89760b Datasheet - Page 24

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mh89760b

Manufacturer Part Number
mh89760b
Description
St-bus? Family T1/esf Framer & Interface
Manufacturer
Mitel
Datasheet

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MH89760B
The channel assignment circuit is therefore very
simple.
The switch matrix, in the message mode, passes
monitor
microprocessor and the T1 interface over ST-BUS
stream 0. The MT8980 is also used to reformat the
ST-BUS
converter and the MH89760B interface.
The MH89760B and the MT8941 form the T1
interface. The MH89760B converts the data received
on the ST-BUS into a 1.544 MHz T1 stream. All of
the formatting and decoding of the T1 signal is
performed by this device. The MT8941 provides the
clock synchronization required to operate in a loop
timed mode. Digital phase-locked loop #2 provides
ST-BUS clocks that are synchronized to the
extracted 8kHz, and digital phase-locked loop #1
provides the transmit 1.544 MHz clock synchronized
to the ST-BUS.
7. High Speed Data Transmission Link
High speed data links are becoming increasingly
popular
4-78
and
in
data
Protocol Converter
private
control
MT8952
streams
MICRO
RxCEN
CDSTo
TxCEN
CDSTi
C4i
F0i
networks
information
between
Figure 17 - High Speed Data Transmission Link
and
between
the
STi0
STo0
F0i
C4i
Switch Matrix
computer
MT8980
protocol
C1.5i
the
STo1
STo2
STo3
C4i
C2i
STi1
STi2
F0i
communications. The basic mode of transmission is
to assemble data into packets (e.g., HDLC or
ethernet) which are transported on a T1 link
configured as a 1.536 Mbit/s serial channel. No T1
repeaters are required if the transmission link length
is 1300 ft. or less (e.g., business complex or
university). However, if the transmission link length is
greater than 1300 ft., a repeatered T1 line must be
leased from the local telephone operating company.
Figure 17 is divided into three functional blocks
which are the protocol converter, switch matrix, and
T1 interface. The protocol section is dependent on
the particular format that is chosen. In this example it
is assumed that the protocol is HDLC. The Transmit
Clock Enable (TxCEN) and the Receive Clock
Enable (RxCEN) of the MT8952 are active for a
period of 24 consecutive ST-BUS channels, and the
clock speed is 2.048 MHz. This enables the protocol
conversion section to interface directly to the switch
matrix. The switch matrix switches the first 24
channels received from the protocol section into the
24 valid timeslots used by the MH89760B. Once the
data enters the T1 interface the MH89760B formats
and transmits the data on the T1 line.
DSTi
DSTo
CSTi1
CSTo
CSTi0
C2i
F0i
C1.5i
C4b
C20
CVb
F0i
F0b
MH89760B
DPLL #1
DPLL #2
MT8941
OUTA
OUTB
E8Ko
C8Kb
RxR
RxT
C12i
C16i
Preliminary Information
T1 Interface
MHz Osc.
MHz Osc.
12.352
16.384
EQUAL-
IZER

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