mh89760b Mitel, mh89760b Datasheet - Page 20
mh89760b
Manufacturer Part Number
mh89760b
Description
St-bus? Family T1/esf Framer & Interface
Manufacturer
Mitel
Datasheet
1.MH89760B.pdf
(38 pages)
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MH89760B
easily accomplished by the MT8980 switch matrix
once the SLIC has digitized the analog signal.
Channel banks must be able to operate in a loop
timed
synchronization requirements of a level four entity.
Phase-locked loop #2 of the MT8941 generates the
ST-BUS clocks that are synchronized to the
extracted 8kHz clock, and phase-locked loop #1
generates the transmit T1 clock synchronized to the
ST-BUS.
4. ISDN Voice/Data Channel Bank/Concentrator
The ISDN channel bank is a term that is used in this
context to describe a system that performs the same
logical function as the D3/D4 channel bank. That is,
it concentrates the subscribers digital loop into the
primary digital transmission scheme, the T1 trunk.
4-74
•
mode
Shift
Shift
Reg.
Reg.
T
T
R
R
so
SLIC #1
SLIC #24
Signalling Interface
•
•
•
•
that
Analog Line Interface
STD
D3
Do
STD
D3
Do
OFHK
CTLi
CTLo
OFHK
MT8870
MT8870
•
•
•
#1
#N
they
PCMi
•
•
PCMo
•
meet
Figure 13 - PCM/Voice Data Channel Bank
• •
• •
• •
•
MT8964
MT8964
•
•
•
MUX
#1
#N
the
PCMi
clock
•
•
STo0
STi0
STo3
STi3
F0i
C4i
Switch Matrix
The ISDN channel bank in Figure 14 is divided into
four blocks, the digital line interface, the switch
matrix, the D channel processing, and the T1
interface. Beginning with the digital line interface, the
MT8910 provides 2B+D 160k bit bidirectional
communication over single twisted pair wiring. The
MT8910 converts the 160kbit line signal into ST-Bus
format, where it can be manipulated by the MT8980
switch matrix. The data received from the MT8910 is
then transferred to the D channel processor by the
switch matrix. The D channel processor converts the
2B+D format used on the 160 kBit digital line into the
23B+D format used on the T1 Link.
MT8980
P
C1.5i
C2i
C4i
F0i
STo1
STo2
STo4
STi1
STi2
•
DSTi
DSTo
CSTi0
CSTo
CSTi1
C2i
F0i
C1.5i
CVb
F0i
F0b
C4b
C2o
MH89760B
Preliminary Information
DPLL#2
MT8941
DPLL#1
C8Kb
T1 Interface
OUTA
C16i
C12i
OUTB
E8Ko
RxR
RxT
MHz Osc.
MHz Osc.
12.352
16.384
Equal-
izer