ST24 STMICROELECTRONICS [STMicroelectronics], ST24 Datasheet - Page 9

• Manufacturer Part Number: ST24
• Description: SERIAL 1K 128 x 8 EEPROM
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

Multibyte Write. For the Multibyte Write mode, the
MODE pin must be at V
mode can be started from any address in the
memory. The master sends from one up to 4 bytes
of data, which are each acknowledged by the mem-
ory. The transfer is terminated by the master gen-
erating a STOP condition. The duration of the write
cycle is t
are accessed on 2 rows (that is have different
values for the 5 most significant address bits A6-
A2), the programming time is then doubled to a
maximum of 20ms. Writing more than 4 bytes in the
Multibyte Write mode may modify data bytes in an
adjacent row (one row is 8 bytes long). However,
the Multibyte Write can properly write up to 8
consecutive bytes only if the first address of these
8 bytes is the first address of the row, the 7 following
bytes being written in the 7 following bytes of this
same row.
Figure 7. Write Cycle Polling using ACK
First byte of instruction
with RW = 0 already
decoded by ST24xxx
W
= 10ms maximum except when bytes
ReSTART
STOP
IH
. The Multibyte Write
NO
NO
START Condition
DEVICE SELECT
WRITE Cycle
Addressing the
with RW = 0
in Progress
Operation is
Returned
Memory
ACK
Next
YES
WRITE Operation
Proceed
YES
Page Write. For the Page Write mode, the MODE
pin must be at V
to 8 bytes to be written in a single write cycle,
provided that they are all located in the same ’row’
in the memory: that is the 5 most significant mem-
ory address bits (A7-A3) are the same. The master
sends from one up to 8 bytes of data, which are
each acknowledged by the memory. After each
byte is transfered, the internal byte address counter
(3 least significant bits only) is incremented. The
transfer is terminated by the master generating a
STOP condition. Care must be taken to avoid ad-
dress counter ’roll-over’ which could result in data
being overwritten. Note that, for any write mode,
the generation by the master of the STOP condition
starts the internal memory program cycle. All inputs
are disabled until the completion of this cycle and
the memory will not respond to any request.
ST24/25C01, ST24C01R, ST24/25W01
Byte Address
Send
IL
. The Page Write mode allows up
Random Address
READ Operation
Proceed
AI01099B
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