lxt362 Intel Corporation, lxt362 Datasheet - Page 30

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lxt362

Manufacturer Part Number
lxt362
Description
Integrated T1 Lh/sh Transceiver For Ds1/dsx-1 Or Pri Applications
Manufacturer
Intel Corporation
Datasheet

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LXT362 — Integrated T1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications
30
1. EC1 sets the receive equalizer gain (EGL) for T1 long-haul operation.
Bit
EC4
0
1
2
3
4
5
6
7
0
0
0
0
0
0
0
0
1
1
1
1
1
1
Table 9.
Table 10. Equalizer Control Input Settings
ENCENB
UNIENB
JASEL0
JASEL1
Name
EC3
EC1
EC2
EC3
EC4
0
0
1
1
0
0
1
1
0
0
1
1
1
1
Control Register #1 Read/Write, Address (A7-A0) = x010000x
EC2
1 = Enable Unipolar I/O mode and allow insertion/detection of BPVs.
0 = Enable Bipolar I/O mode
1 = Enable B8ZS encoders/decoders and force Unipolar I/O mode.
0 = Disable B8ZS encoders/decoders
Select jitter attenuation circuitry position in data path or disables the
JA. See right hand section of table for codes.
0
1
0
1
0
1
0
1
0
1
0
0
1
1
EC1
0
0
0
0
1
1
1
1
1
1
0
1
0
1
1
(see
Table 10
Sets T1 mode and equalizer
D4 Short Haul
T1 Short Haul
T1 Short Haul
T1 Short Haul
T1 Short Haul
T1 Short Haul
T1 Long Haul
T1 Long Haul
T1 Long Haul
T1 Long Haul
T1 Long Haul
T1 Long Haul
T1 Long Haul
T1 Long Haul
Function
below for control codes).
Function
133-266 ft / 1.2 dB
266-399 ft / 1.8 dB
399-533 ft / 2.4 dB
533-655 ft / 3.0 dB
0-133 ft / 0.6 dB
Ñ
-15.0 dB pulse
-22.5 dB pulse
-15.0 dB pulse
-22.5 dB pulse
-7.5 dB pulse
-7.5 dB pulse
0.0 dB pulse
0.0 dB pulse
6 V pulse
Pulse
JASEL0
100
100
100
100
100
100
100
100
100
100
100
100
100
100
1
1
0
Cable
Jitter Attenuator
TP
TP
TP
TP
TP
TP
TP
TP
TP
TP
TP
TP
TP
TP
JASEL1
X
0
1
Datasheet
Position
Transmit
Disabled
Receive
36 dB
36 dB
36 dB
36 dB
26 dB
26 dB
26 dB
26 dB
12 dB
12 dB
12 dB
12 dB
12 dB
12 dB
Gain

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