w89c840af Winbond Electronics Corp America, w89c840af Datasheet - Page 44

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w89c840af

Manufacturer Part Number
w89c840af
Description
100/10mbps Ethernet Controller
Manufacturer
Winbond Electronics Corp America
Datasheet

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Part Number:
W89C840AF
Manufacturer:
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20 000
C00/CBCR Bus Control Register:
control of the descriptor, cache alignment control, burst length control, descriptor skip length and the internal bus
access priority. In addition to the bus master control, the software reset will be performed after programming a
logic 1 to the software reset bit of C00/CBCR. Before writing data to the C00/CBCR, the transmit and receive
processes must be stopped. Otherwise the current transmit or receive operation will not be completed correctly.
paragraph. There are total 21 registers to be described in register code order in this paragraph.
Register, C08/CRSDR Receive Start Demand Register, C0C/CRDLA Receive Descriptors List Addresses,
C10/CTDLA Transmit Descriptors List Addresses, C14/CISR Interrupt Status Register, C18/CNCR Network
Configuration Register, C1C/CIMR Interrupt Mask Register, C20/CFDCR Frame Discarded Counter Register,
C24/CMIIR MII Management and ROM Register, C28/CBROA Boot ROM Offset Address Register, C2C/CGTR
General Timer Register, C30/CRDAR Current Receive Descriptor Address Register, C34/CRBAR Current Receive
Buffer Address Register, C38/CMA0 Multicast Address Register 0, C3C/CMA1 Multicast Address Register 1,
C40/CPA0 Physical Address Register 0, C44/CPA1 Physical Address Register 1, C48/CBRCR Boot ROM Size
Configuration Register, C4C/CTDAR Current Transmit Descriptor Address Register and C50/CTBAR Current
Transmit Buffer Address Register.
Bit
31:22
C1C
C20
C24
C28
C2C
C30
C34
C38
C3C
C40
C44
C48
C4c
C50
The detailed function and operation for each register in the W89C840AF will be described in the following
The full name of these registers are C00/CBCR Bus Control Register, C04/CTSDR Transmit Start Demand
This register defines the configuration of bus master, including the wait state control, the endian mode
The following table particularly describes the function of each bit of the register C00/CBCR.
Attribute
R
CIMR
CFDCR
CMIIR
CBROA
CGTP
CRDAR
CRBAR
CMA0
CMA1
CPA0
CPA1
CBRCR
CTDAR
CTBAR
Bit name
---
Description
Reserved. Fixed at 0.
00000000H
00000000H
00000000H
00000000H
00000000H
00000000H
00000000H
00000000H
00000000H
00000000H
00000000H
00000000H
00000000H
00000000H
-44 -
Publication Release Date:October 2000
Revision 1.01
00000000H
00000000H
00000000H
00000000H
00000000H
00000000H
00000000H
00000000H
00000000H
not affected
not affected
not affected
not affected
not affected
W89C840AF

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