w89c840af Winbond Electronics Corp America, w89c840af Datasheet - Page 28

• Manufacturer Part Number: w89c840af
• Description: 100/10mbps Ethernet Controller
• Manufacturer: Winbond Electronics Corp America

both of the bit 13 and bit 14 are 1, it will not properly initialize the read or the write operation for ROM device.
The application program can check the contents of the register C24/CMIIR to know if the read or write
operation is already completed or not. The W89C840AF will start the read or the write operation when the bit
14 or bit 13 are set to high and will reset the bit 14 or bit 13 to 0 automatically after the read/write operation is
completed. For the writing operation, the software driver should not start up the next write data request until the
bit 13 of C24/CMIIR is reset to 0 by the W89C840AF. For the read operation, the read data will be valid only if
the bit 14 of the register C24/CMIIR is reset to 0 by the W89C840AF.
C28/CBROA will not affect the memory space configuration of the host system because either read or write
operation is performed through the PCI I/O access command.
MII management function
external physical layer device. The bits 16, 17, 18 and 19 of C24/CMIIR are designed for MII management .
When the bit 18 is reset to low, the MDIO signal on MII bus is an input of W89C840AF. The data on the
MDIO will be reflected transparently on the bit 19 of the register C24/CMIIR. No data latching function for this
input data. While the bit 18 is set to high, the MDIO signal on MII will be changed to be an output pin of
W89C840AF and the data written to the bit 17 of the register C24/CMIIR will be driven onto the MDIO. To
generate the necessary clock for MII management, the application program can write 1 and 0 alternately to the
bit 16 of the register C24/CMIIR. The clock is used by the external physical layer device to clock in the written
data or to clock out the read data.
System resource configuring function
communication between the network and the host.
how large the I/O space the W89C840AF requires. The W89C840AF will return a FFFFF801H value if the
system BIOS has previously written all 1 value into the F10/FBIOA. This means that the W89C840AF requires
128 bytes system I/O space. The I/O space allocated for the W89C840AF is relied on which I/O address base is
written into F10/FBIOA. The W89C840AF will decode the address message based on the content of the register
F10/FBIOA to determine if the current PCI transaction is accessed to its registers.
W89C840AF and read back its value to determine how large memory space the W89C840AF requires. The
W89C840AF will also return FFFFF801H value if the system BIOS has previously written all 1 value into the
register F14/FBMA. This means that the W89C840AF requires 128 bytes system memory space. The memory
space allocated for the W89C840AF depends on which memory address base is written into the register
F14/FBMA. The W89C840AF will decode the address message based on the content of the register F14/FBMA
to determine if the current PCI transaction is accessed to its registers.
The bit 13 and bit 14 of the register C24/CMIIR should not be set to 1 at the same time. In the case of
The operation of reading or writing for the on-board ROM device through the registers C24/CMIIR and
The MII management function provided by W89C840AF can be used to access the registers of the
The W89C840AF will require the I/O space, memory space and the interrupt line to perform the
The system BIOS can write all 1 data into the register F10/FBIOA and read back its value to determine
For memory space allocation, the system BIOS can write all 1 value into the register F14/FBMA of the
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Publication Release Date:October 2000
Revision 1.01
W89C840AF