lc75808e Sanyo Semiconductor Corporation, lc75808e Datasheet - Page 28

• Manufacturer Part Number: lc75808e
• Description: 1/8 To 1/10 Duty Lcd Display Drivers With Key Input Function
• Manufacturer: Sanyo Semiconductor Corporation

Voltage Detection Type Reset Circuit (VDET)
This circuit generates an output signal and resets the system when logic block power is first applied and when the voltage
drops, i.e., when the logic block power supply voltage is less than or equal to the power down detection voltage VDET,
which is 3.0V, typical. To assure that this function operates reliably, a capacitor must be added to the logic block power
supply line so that the logic block power supply voltage V
logic block power supply voltage V
Power Supply Sequence
The following sequences must be observed when power is turned on and off. (See Figure 3, 4, and 5.)
• Power on :Logic block power supply(V
• Power off:LCD driver block power supply(V
However, if the logic and LCD driver blocks use a shared power supply, then the power supplies can be turned on and off
at the same time.
System Reset
1. Reset Function
• Clearing the display off state
• Clearing the key scan disabled and key data reset states
• Clearing the general-purpose output ports locked at the low level (V
• 1/8 duty
Transferring all the serial data (the display data and the control data) creates a state in which the display is turned on.
Transferring the control data not only creates a state in which key scanning can be performed, but also clears the key
data reset.
Transferring the control data clears the general-purpose output ports locked at the low level (V
states of the general-purpose output ports.
Internal data (D1 to D120)
Internal data (D121 to D240)
Internal data (D241 to D360)
Internal data (D361 to D480)
Key scan
General-purpose output ports
Display state
The LC75808E/W performs a system reset with the VDET. When a system reset is applied, the display is turned off, key
scanning is disabled, the key data is reset, and the general-purpose output ports are set to and held at the low level (V
These states that are created as a result of the system reset can be cleared by executing the instruction described below.
(See figure 3, 4, and 5.)
Internal data (KC1 to KC6, PC1 to
CE
V
V
DD
LCD
PC4, CT0 to CT3, CTC,
SC, SP, DT1, DT2)
Fixed at the low level (V
DD
fall time when the voltage drops are both at least 1 ms. (See Figure 3, 4, and 5.)
Undefined
Undefined
Undefined
Undefined
Undefined
Disabled
DD
) on
LCD
LC75808E, 75808W
SS
) off
)
LCD driver block power supply(V
Figure 3
Display off
DD
Logic block power supply(V
Can be set to either the high (V
rise time when the logic block power is first applied and the
• t1 ≥ 1 ms (Logic block power supply voltage V
• t2 ≥ 0
• t3 ≥ 0
• t4 ≥ 1 ms (Logic block power supply voltage V
SS
) state
Execution enabled
DD
) or low (V
LCD
DD
) on
) off
Display on
SS
Defined
Defined
Defined
Defined
Defined
) level.
SS
) state and sets the
DD
DD
rise time)
fall time)
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Undefined
Undefined
Undefined
Undefined
Undefined
SS
).