74LVC2G32DC,125 NXP Semiconductors, 74LVC2G32DC,125 Datasheet - Page 7

• Manufacturer Part Number: 74LVC2G32DC,125
• Description: IC DUAL 2-IN OR GATE 8VSSOP
• Manufacturer: NXP Semiconductors
• Series: 74LVCr

Specifications of 74LVC2G32DC,125

• Number Of Circuits: 2
• Package / Case: US8, 8-VSSOP
• Logic Type: OR Gate
• Number Of Inputs: 2
• Current - Output High, Low: 32mA, 32mA
• Voltage - Supply: 1.65 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Product: OR
• Logic Family: LVC
• High Level Output Current: - 32 mA
• Low Level Output Current: 32 mA
• Propagation Delay Time: 2.2 ns
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 1.65 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 74LVC2G32DC-G; 74LVC2G32DC-G; 935274976125

NXP Semiconductors
11. Dynamic characteristics
Table 8.
Voltages are referenced to GND (ground 0 V); for test circuit see
[1]
[2]
[3]
12. Waveforms
74LVC2G32_6
Product data sheet
Symbol Parameter
t
C
pd
Fig 7.
PD
Typical values are measured at nominal V
t
C
P
f
f
C
V
N = number of inputs switching;
pd
i
o
(C
D
CC
PD
= input frequency in MHz;
L
= output frequency in MHz;
is the same as t
= output load capacitance in pF;
= C
L
is used to determine the dynamic power dissipation (P
= supply voltage in V;
propagation delay nA, nB to nY; see
power dissipation
capacitance
Measurement points are given in
V
Input (nA, nB) to output (nY) propagation delays
PD
V
OL
Dynamic characteristics
CC
2
and V
V
CC
f
o
2
) = sum of outputs.
OH
PLH
f
i
are typical output voltage levels that occur with the output load.
N + (C
and t
PHL
Conditions
per gate; V
L
.
V
V
V
V
V
CC
CC
CC
CC
CC
V
CC
nA, nB input
= 1.65 V to 1.95 V
= 2.3 V to 2.7 V
= 2.7 V
= 3.0 V to 3.6 V
= 4.5 V to 5.5 V
nY output
2
Table
f
CC
I
o
= GND to V
) where:
and at T
9.
GND
V
V
OH
OL
V
Figure 7
Rev. 06 — 27 February 2008
I
amb
CC
= 25 C.
D
in W).
V
M
V
[2]
[3]
M
t
PHL
Figure
Min
1.3
0.8
0.8
0.9
0.7
-
8.
40 C to +85 C
Typ
3.9
2.4
2.7
2.2
1.7
14
t
PLH
[1]
mna224
Max
8.8
4.7
4.8
4.2
3.2
-
74LVC2G32
40 C to +125 C Unit
Min
1.3
0.8
0.8
0.9
0.7
Dual 2-input OR gate
-
© NXP B.V. 2008. All rights reserved.
Max
5.9
6.0
5.3
4.0
11
-
ns
ns
ns
ns
ns
pF
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