AD660SQ/883B AD [Analog Devices], AD660SQ/883B Datasheet
AD660SQ/883B
Related parts for AD660SQ/883B
AD660SQ/883B Summary of contents
Page 1
FEATURES Complete 16-Bit D/A Function On-Chip Output Amplifier On-Chip Buried Zener Voltage Reference 1 LSB Integral Linearity 15-Bit Monotonic over Temperature Microprocessor Compatible Serial or Byte Input Double Buffered Latches Fast (40 ns) Write Pulse Asynchronous Clear (to 0 ...
Page 2
AD660–SPECIFICATIONS Parameter RESOLUTION DIGITAL INPUTS ( MIN MAX V (Logic “1” (Logic “0” TRANSFER FUNCTION CHARACTERISTICS Integral Nonlinearity T ...
Page 3
AC PERFORMANCE CHARACTERISTICS Ratio, these characteristics are included for design guidance only and are not subject to test. THD+N and SNR are 100% tested + – MIN A MAX ...
Page 4
... C to +85 C AD660AR – +85 C AD660BN – +85 C AD660BR – +85 C AD660SQ – +125 C AD660SQ/883B** – +125 Plastic DIP Cerdip SOIC. **Refer to AD660/883B military data sheet. TIMING CHARACTERISTICS Parameter Limit +25 C (Figure la ...
Page 5
BIT0 t SER SS BIT1 "1" = MSB FIRST, "0" = LSB FIRST CS LDAC CLR LBE Figure 1c. Asynchronous Clear to Bipolar or Unipolar Zero BIT0 SER BIT 1 (MSB/LSB) CS SERIAL OUT DEFINITIONS OF SPECIFICATIONS INTEGRAL NONLINEARITY: Analog ...
Page 6
AD660 SIGNAL-TO-NOISE RATIO: The signal-to-noise ratio is de- fined as the ratio of the amplitude of the output when a full- scale signal is present to the output with no signal present. This is measured in dB. DIGITAL-TO-ANALOG GLITCH IMPULSE: ...
Page 7
BIPOLAR CONFIGURATION The circuit shown in Figure 4a will provide a bipolar output voltage from –10.000000 V to +9.999694 V with positive full scale occurring with all bits ON the unipolar mode, resis- tors R1 and R2 may ...
Page 8
AD660 Figure 5 shows the AD660 using the AD586 precision 5 V refer- ence in the bipolar configuration. The highest grade AD586MN is specified with a drift of 2 ppm/ C which is a 7.5 improve- ment over the AD660’s ...
Page 9
OUTPUT SETTLING AND GLITCH The AD660’s output buffer amplifier typically settles to within 0.0008% FS (1/2 LSB) of its final value for a full-scale step. Figures 7a and 7b show settling for a full-scale and an LSB ...
Page 10
AD660–Microprocessor Interface Section AD660 TO MC68HC11 (SPI BUS) INTERFACE The AD660 interface to the Motorola SPI (serial peripheral in- terface) is shown in Figure 8. The MOSI, SCK, and SS pins of the HC11 are respectively connected to the BIT0, ...
Page 11
The address decoder analyzes the input-output address pro- duced by the processor to select the function to be performed by the AD660, qualified by the coincidence of the Input-Output Request (IORQ*) and Write (WR*) pins. The least significant address bit ...
Page 12
AD660 GROUNDING The AD660 has two pins, designated analog ground (AGND) and digital ground (DGND.) The analog ground pin is the “high quality” ground reference point for the device. Any exter- nal loads on the output of the AD660 should ...