cxa1734s Sony Electronics, cxa1734s Datasheet - Page 18

• Manufacturer Part Number: cxa1734s
• Description: Us Audio Multiplexing Decoder
• Manufacturer: Sony Electronics

(1) L + R (MAIN)
(2) L - R (SUB)
(3) SAP
(4) Mode discrimination
(5) dbx-TV block
(6) Others
After the audio multiplexing signal input from COMPIN (Pin 11) passes through MVCA, the SAP signal
and telemetry signal are suppressed by STEREO LPF. Next, the pilot signals are canceled. Finally, the
L - R signal and SAP signal are removed by MAIN LPF, and frequency characteristics are flattened
(de-emphasized) and input to the matrix.
The L - R signal follows the same course as L + R before the pilot signal is canceled. L - R has no
carrier signal, as it is a suppressed-carrier double-sideband amplitude modulated signal (DSB-AM
modulated). For this reason, the pilot signal is used to regenerate the carrier signal (quasi-sine wave)
to be used for the demodulation of the L - R signal. In the last stage, the residual high frequency
components are removed by SUB LPF and the L - R signal is input to the dbx-TV block via the NRSW
circuit after passing through SUBVCA.
SAP is an FM signal using 5f
extracted using SAP BPF. Then, this is subjected to FM detection. Finally, residual high frequency
components are removed and freqency characteristics flattened using SAP LPF, and the SAP signal is
input to the dbx-TV block via the NRSW circuit. When there is no SAP signal, the Pin 18 output is soft
muted.
Stereo discrimination is performed by detecting the pilot signal amplitude. SAP discrimination is
performed by detecting the 5f
noise near 25 kHz after FM detection.
Either the SAP signal or L - R signal input respectively from ST IN (Pin 14) or SAP IN (Pin 19) is
selected by the mode control and input to the dbx-TV block.
The input signal then passes through the fixed de-emphasis circuit and is applied to the variable de-
emphasis circuit. The signal output from the variable de-emphasis circuit passes through an external
capacitor and is applied to VCA (voltage control amplifier). Finally, the VCA output is converted from a
current to a voltage using an operational amplifier and then input to the matrix.
The variable de-emphasis circuit transmittance and VCA gain are respectively controlled by each of
effective value detection circuits. Each of the effective value detection circuits passes the input signal
through a predetermined filter for weighting before the effective value of the weighted signal is
detected to provide the control signal.
“MVCA” is a VCA which adjusts the input signal level to the standard level of this IC. In addition, the
input signal enters the decoder without passing through MVCA by setting to ATTSW = 1.
The signals (L + R, L - R, SAP) input to “MATRIX” are selected according to the BUS data and
whether there is ST or SAP discrimination, and any one of the ST-L, ST-R, MONO or SAP signals is
output to LOUT and ROUT.
“Bias” supplies the reference voltage and reference current to the other blocks. The currents flowing to
the resistors connecting IREF (Pin 6) and ITIME (Pin 27) with GND become the reference current.
H
H
carrier amplitude. NOISE discrimination is performed by detecting the
as a carrier as shown in the Fig.1. First, the SAP signal only is
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CXA1734S