74AHCT1G14GW,125 NXP Semiconductors, 74AHCT1G14GW,125 Datasheet - Page 9

• Manufacturer Part Number: 74AHCT1G14GW,125
• Description: IC INV SCHMITT TRIG SC-88A
• Manufacturer: NXP Semiconductors
• Series: 74AHCTr

Specifications of 74AHCT1G14GW,125

• Number Of Circuits: 1
• Logic Type: Inverter with Schmitt Trigger
• Package / Case: SC-70-5, SC-88A, SOT-323-5, SOT-353, 5-TSSOP
• Number Of Inputs: 1
• Current - Output High, Low: 8mA, 8mA
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Logic Family: AHCT
• High Level Output Current: - 8 mA
• Low Level Output Current: 8 mA
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 4.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 568-4545-2; 74AHCT1G14GW-G; 74AHCT1G14GW-G; 935263008125

NXP Semiconductors
14. Application information
74AHC_AHCT1G14_6
Product data sheet
Fig 12. Typical 74AHCT1G14 transfer characteristics;
(mA)
I
CC
5
4
3
2
1
0
0
V
CC
= 4.5 V
1
The slow input rise and fall times cause additional power dissipation, which can be
calculated using the following formula:
P
Average additional I
Figure 14
For 74AHC1G14 and 74AHCT1G14 used in relaxation oscillator circuit, see
Note to the application information:
1. All values given are typical unless otherwise specified.
2
add
P
f
t
t
i
r
f
I
add
= input frequency (MHz);
= input fall time (ns); 90 % to 10 %;
= input rise time (ns); 10 % to 90 %;
CC(AV)
= f
= additional power dissipation ( W);
i
3
and
(t
= average additional supply current ( A).
r
Figure
4
I
CC(AV)
V
mna404
I
(V)
CC
15.
differs with positive or negative input transitions, as shown in
5
+ t
Rev. 06 — 18 May 2009
f
I
CC(AV)
74AHC1G14; 74AHCT1G14
Fig 13. Typical 74AHCT1G14 transfer characteristics;
)
(mA)
I
CC
V
CC
8
6
4
2
0
0
V
CC
where:
= 5.5 V
2
Inverting Schmitt trigger
4
© NXP B.V. 2009. All rights reserved.
V
I
(V)
mna405
Figure
6
16.
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