IDT72211 IDT [Integrated Device Technology], IDT72211 Datasheet - Page 16

• Manufacturer Part Number: IDT72211
• Description: CMOS SyncFIFO 64 X 9, 256 x 9, 512 x 9, 1024 X 9, 2048 X 9 and 4096 x 9
• Manufacturer: IDT [Integrated Device Technology]

IDT72421/72201/72211/72221/72231/72241 CMOS SyncFIFO
64 x 9, 256 x 9, 512 x 9, 1024 x 9, 2048 x 9 and 4096 x 9
(If Applicable)
NOTES:
1. PAE offset = n.
2. t
3. If a read is performed on this rising edge of the read clock, there will be Empty + (n-1) words in the FIFO when
edge of WCLK and the rising edge of RCLK is less than t
REN1
REN2
WCLK
WEN1
WEN2
SKEW2
RCLK
PAE
,
is the minimum time between a rising WCLK edge and a rising RCLK edge for
n words in FIFO
t
CLKH
t
t
t
ENS
ENS
SKEW2
t
CLKL
(2)
Figure 11. Programmable Empty Flag Timing
t
t
ENH
ENH
SKEW2
t
PAE
, then
(1)
PAE
5.07
may not change state until the next RCLK rising edge.
PAE
to change during that clock cycle. If the time between the rising
n+1 words in FIFO
MILITARY AND COMMERCIAL TEMPERATURE RANGES
t
ENS
t
ENH
PAE
goes LOW.
(3)
t
PAE
2655 drw 13
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