S80C188EB13 INNOVASIC [InnovASIC, Inc], S80C188EB13 Datasheet - Page 40

• Manufacturer Part Number: S80C188EB13
• Description: 8-Bit/16-Bit Microcontrollers
• Manufacturer: INNOVASIC [InnovASIC, Inc]

IA186EB/IA188EB
8-Bit/16-Bit Microcontrollers
Table 8. IA188EB Pin/Signal Descriptions (Continued)
Signal
s0_n
s1_n
s2_n
t0out
t1out
sint1
rxd0
rxd1
t0in
t1in
p2.3/sint1
p2.0/rxd1
Name
t0out
t1out
s0_n
s1_n
s2_n
rxd0
t0in
t1in
PLCC
53
57
10
55
46
45
48
47
9
8
Pin
LQFP
40
44
79
78
77
42
33
32
35
34
UNCONTROLLED WHEN PRINTED OR COPIED
PQFP
42
41
40
76
75
78
77
3
7
5
Page 40 of 85
IA211080314-13
Receive (rx) data, Serial Port 0. Input/Output.
This pin is the serial data input for Serial Port 0.
During synchronous serial communications,
rxd0 is bidirectional and functions an output for
data transmission (txd0 becomes the clock).
Receive (rx) data, Serial Port 1. Input/Output.
This pin is the serial data input for Serial Port 1.
During synchronous serial communications,
rxd1 is bidirectional and functions an output for
data transmission (txd1 becomes the clock).
statusN (N = 0–2). Output. During a bus cycle
the status (i.e., type) of cycle is encoded on
these lines as follows:
s2_n
serial interrupt, Serial Port 1. Output. Active
High. When sint1 is asserted (high), it
indicates that Serial Port 1 requires service.
timer 0 input. Input. Depending on the Timer
Mode programmed for Timer 0, this input is
used either as clock input or a control signal.
timer 0 output. Output. Depending on the
Timer Mode programmed for Timer 0, this
output can provide a single clock or a
continuous waveform.
timer 1 input. Input. Depending on the Timer
Mode programmed for Timer 1, this input is
used either as clock input or a control signal.
timer 1 output. Output. Depending on the
Timer Mode programmed for Timer 1, this
output can provide a single clock or a
continuous waveform.
0
0
0
0
1
1
1
1
s1_n
0
0
1
1
0
0
1
1
s0_n
0
1
0
1
0
1
0
1
Description
Interrupt Acknowledge
Read I/O
Write I/O
Processor HALT
Queue Instruction Fetch
Read Memory
Write Memory
No Bus Activity
Bus Cycle Status
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July 10, 2011
Data Sheet
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