S80C188EB13 INNOVASIC [InnovASIC, Inc], S80C188EB13 Datasheet - Page 29

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S80C188EB13

Manufacturer Part Number
S80C188EB13
Description
8-Bit/16-Bit Microcontrollers
Manufacturer
INNOVASIC [InnovASIC, Inc]
Datasheet
IA186EB/IA188EB
8-Bit/16-Bit Microcontrollers
Table 7. IA186EB Pin/Signal Descriptions (Continued)
inta1_n
once_n
lock_n
Signal
ncs_n
lcs_n
nmi
a19/once_n
int3/inta1_n
lock_n
Name
ncs_n
lcs_n
nmi
PLCC
34
29
15
60
17
83
Pin
LQFP
NA
22
17
69
4
5
UNCONTROLLED WHEN PRINTED OR COPIED
PQFP
NA
65
60
47
48
32
Page 29 of 85
IA211080314-13
interrupt acknowledge 1. Input/Output. Active
Low. This pin provides an interrupt
acknowledge handshake in response to an
interrupt request on the int1 pin (see previous
table entry).
lower chip select. Output. Active Low. This
pin provides a chip select signal that will be
asserted (low) whenever the address of a
memory bus cycle is within the address space
programmed for that output.
lock. Output. Active Low. When asserted
(low), this signal indicates that the bus cycle in
progress is cannot be interrupted. While
lock_n is active, the IA186EB will not service
bus requests such as HOLD.
numerics coprocessor select. Output. Active
Low. This signal is asserted (low) when the
IA186EB accesses an Intel 80C187 Numerics
Coprocessor.
non-maskable interrupt. Input. Active High.
When the nmi signal is asserted (high) it
causes a Type 2 interrupt to be serviced by the
IA186EB.
Note: The assertion of nmi is latched internally
by the IA186EB.
on-circuit emulation. Input. Active Low. Note:
ONCE Mode is used for device testing.
If the once_n pin is driven low during a reset
operation, all IA186EB output and input/output
pins are placed in a high-impedance state.
This pin is weakly held high while resin_n is
active.
Description
http://www.Innovasic.com
Customer Support:
July 10, 2011
Data Sheet
1-888-824-4184

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