16C6N4 RENESAS [Renesas Technology Corp], 16C6N4 Datasheet - Page 86

• Manufacturer Part Number: 16C6N4
• Description: Renesas MCU
• Manufacturer: RENESAS [Renesas Technology Corp]

M16C/6N Group (M16C/6N4)
Rev.2.40
REJ03B0003-0240
Under development
This document is under development and its contents are subject to change.
Figure 5.28 Timing Diagram (7)
Memory Expansion Mode and Microprocessor Mode
(For 2-wait setting, external area access and multiplexed bus selection)
Read timing
Write timing
Measuring conditions :
tcyc =
Aug 25, 2006
VCC = 3.3 V
Input timing voltage : V
Output timing voltage : V
WR,WRL,
WRH
BCLK
BCLK
CSi
BHE
f(BCLK)
ADi
/DBi
ADi
/DBi
ADi
ALE
CSi
BHE
ADi
ALE
RD
1
t
d(BCLK-ALE)
page 86 of 88
t
d(BCLK-CS)
t
d(BCLK-ALE)
(0.5 ✕ tcyc-40)ns.min
40ns.max
t
t
t
40ns.max
t
40ns.max
t
d(BCLK-AD)
d(BCLK-CS)
d(AD-ALE)
40ns.max
d(BCLK-AD)
(0.5 ✕ tcyc-40)ns.min
d(AD-ALE)
40ns.max
40ns.max
IL
OL
= 0.6 V, V
Address
= 1.65 V, V
Address
t
t
h(BCLK-ALE)
h(BCLK-ALE)
-4ns.min
-4ns.min
IH
OH
= 2.7 V
= 1.65 V
t
d(BCLK-RD)
t
(0.5 ✕ tcyc-15)ns.min
d(BCLK-DB)
t
h(ALE-AD)
t
50ns.max
40ns.max
40ns.max
d(BCLK-WR)
t
d(AD-WR)
t
0ns.min
d(AD-RD)
0ns.min
t
dZ(RD-AD)
8ns.max
tcyc
tcyc
(1.5 ✕ tcyc-50)ns.min
(1.5 ✕ tcyc-60)ns.max
Data output
t
d(DB-WR)
t
ac3(RD-DB)
5. Electric Characteristics (Normal-ver.)
Data input
t
SU(DB-RD)
50ns.min
(0.5 ✕ tcyc-10)ns.min
(0.5 ✕ tcyc-10)ns.min
t
t
h(RD-CS)
h(BCLK-WR)
t
(0.5 ✕ tcyc-10)ns.min
h(BCLK-RD)
(0.5 ✕ tcyc-10)ns.min
t
(0.5 ✕ tcyc-10)ns.min
h(WR-CS)
t
0ns.min
0ns.min
t
t
h(RD-AD)
t
h(RD-DB)
h(WR-AD)
h(WR-DB)
0ns.min
t
VCC = 3.3 V
t
h(BCLK-AD)
h(BCLK-AD)
t
h(BCLK-CS)
t
4ns.min
t
4ns.min
4ns.min
h(BCLK-CS)
4ns.min
h(BCLK-DB)
4ns.min
Address
Address