VDIP1_10 FTDI [Future Technology Devices International Ltd.], VDIP1_10 Datasheet - Page 13

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VDIP1_10

Manufacturer Part Number
VDIP1_10
Description
Vinculum VNC1L Module
Manufacturer
FTDI [Future Technology Devices International Ltd.]
Datasheet
3.7 Signal Descriptions - Parallel FIFO Interface
The Parallel FIFO interface I/O pin description of the VNC1L device is shown in
Table 3.8 - Default Interface I/O Pin Configuration Option – Paralle FIFO Interface
6
8
9
10
11
12
13
14
15
16
17
19
Pin No.
D0
D1
D2
D3
D4
D5
D6
D7
RXF#
TXE#
RD#
WR
Name
Copyright © 2010 Future Technology Devices International Limited
`
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
OUTPUT
OUTPUT
INPUT
INPUT
Type
written into the
Enables the current
next FIFO data byte (if avail- able) fro m the recei ve FIFO buffer w hen
RD# goes fro m high to low
When high, do not write data into the FIFO. When low, data can be
FIFO Data Bus Bit 0
FIFO Data Bus Bit 1
FIFO Data Bus Bit 2
FIFO Data Bus Bit 3
FIFO Data Bus Bit 4
FIFO Data Bus Bit 5
FIFO Data Bus Bit 6
FIFO Data Bus Bit 7
When high, do not read data from the FIFO. When low, there is data
available in the FIFO which can be read by stro bing RD# low, t hen
high again.
Writes the data byte on the D0...D7 pins into the transmit FIFO buffer
when WR goes from high to low.
VDIP1 Vinculum VNC1L Module Datasheet Version 1.01
FIFO by strobing WR high, then low.
FIFO data byte on D0...D7 when low. Fetched the
Document Reference No.: FT_000016
Description
Table 3.8
Clearance No.: FTDI# 131
12

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