SD6830P AUK [AUK corp], SD6830P Datasheet - Page 12

• Manufacturer Part Number: SD6830P
• Description: 4BIT MICROCONTROLLER
• Manufacturer: AUK [AUK corp]

6.11 Watchdog timer (WDT)
The watchdog timer provides the means to return to a reset condition when a system
malfunction occurs and the program enters an infinite loop caused by noise or any
abnormal state.
Also this timer have a function of oscillation stabilization timer. This is a 13-bit counter,
counts the clock which is divided twelve (F
stops but when a key input is detected (Port D, Port E) oscillation starts. When 12288 clock
cycles have been counted, the program will be executed from reset address (000H). If the
port C data register’s value does not change from “L” to “H” before the timer counts 98304
clock cycles, a device reset condition is generated.
The oscillator stabilization time : 12/F
The time-out period
PORT C Data : Low to High Transition
counting value
OSCOUT
Fsys/12
98304
12288
WDT
PC
Power-on Reset Active
0
PORT C Data
Low to High
Stop Mode Active
CLK
Normal
mode
Figure 6-4. Function of Watchdog Timer
: 12/F
Watchdog Timer
Overflow
Watchdog Timer (13-bit)
SYS
SYS
STOP
Instruction
* 2
* 2
KSI-W002-000
RESET
mode
Stop
SYS
10
13
/12). In the stop mode the oscillation circuit
= 1/F
= 1/F
SYS
27mS(Min.)
SYS
* 12288 = 27mS (@455KHz)
* 98304 = 216mS (@455KHz)
OVERFLOW
OPSTART
Normal
mode
PORT C Data
Low to High
Time
Operating Start
To Reset Logic
SD6830
12