lc895196 Sanyo Semiconductor Corporation, lc895196 Datasheet - Page 11

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lc895196

Manufacturer Part Number
lc895196
Description
Ata-pi Compatible Cd-rom Decoder Ic
Manufacturer
Sanyo Semiconductor Corporation
Datasheet
3. The Buffer RAM
4. Subcode Interface
5. The CD-DSP Data
6. The D/A Converter Interface
7. Other Pins
D7 to D0 (input/output)
ZINT (output)
IO0 to IO15 (input/output)
RA0 to RA9 (output)
ZRAS0 and ZRAS1 (output)
ZCAS0 and ZCAS1 (output)
ZOE (output)
ZUWE, ZLWE (output)
EXCK, WFCK, SBSO, SCOR (input or output)
BCK, SDATA, LRCK, C2PO (input)
DLRCK, DBCK (output)
DSDATA (output)
ZRESET (input)
XTALCK0, XTAL0
XTALCK1, XTAL1
MCK (output)
This is the MC-side data bus. Built-in pull-up resistor.
This is the interrupt signal to the microcontroller.
This is the buffer DRAM data bus. Built-in pull-up resistors.
These are the address pins for the buffer RAM.
These are the RAS output pins for the buffer DRAM. Normally ZRAS0 is used; however, when two 1M (64K
bit )DRAMS are used, connect the RAS pins of each DRAM to ZRAS0 and ZRAS1.
This is the CAS output pin for the buffer DRAM. Normally ZCAS0 is used. When two 1M (64K
are used, connect the ZCAS0 output to the CAS pin of each DRAM. When the 2CAS types is used, connect ZCAS0
to UCAS and connect ZCAS1 to LCAS.
The read output signal for the buffer DRAM.
This is the write output signal for the buffer DRAM. This connects to various DRAM pins. When the 2CAS type is
used, connect ZLWE to the write enable signal.
These are the subcode interface pins. By connecting these to the CD-DSP the subcode data is accepted by the
LC895196 and transferred to the host.
When connected to CD-DSP, CD-ROM data is acquired. C2PO is a pin for use by the C2 flag.
These are the DAC pins made by XTALCK0 or XTALCK1.
This outputs serial data to the DAC.
This is the LC895196 reset pin. The LC895196 is reset when this signal is low. This signal must be kept low for at
least a period of 1 µs after power on.
These cause oscillation at 25 MHz or 27 MHz. Multiples of these respective clocks may also be input. Frequencies
from the outside may also be input into XTALCK0.
These are specialty pins for the DLRCK, DBCK, and IDE, which output to the DAC. They cause a 33.8688 MHz
oscillation. A frequency may be input into XTALCK1 from the outside.
This outputs the XTALCK1 and XTALCK1/2 frequencies. The output can also be turned off.
LC895196
16 bit) DRAMS
No. 5737-11/12
16

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