lc895195 Sanyo Semiconductor Corporation, lc895195 Datasheet - Page 7

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lc895195

Manufacturer Part Number
lc895195
Description
Ata-pi Ide Cd-rom Decoder Lsi
Manufacturer
Sanyo Semiconductor Corporation
Datasheet
3. Buffer RAM Pins
4. Subcode Interface Pins
5. CD-DSP Data Pins
6. Other Pins
• ZSWAIT (output)
• D7 to D0 (I/O)
• ZINT (output)
• ZINT1 (output)
• IO0 to IO15 (I/O)
• RA0 to RA9 (output)
• ZRAS0, ZRAS1 (output)
• ZCAS0, ZCAS1 (output)
• ZOE (output)
• ZUWE, ZLWE (output)
• EXCK, WFCK, SBSO, SCOR (input or output)
• BCK, SDATA, LRCK, C2PO (input)
• ZRESET (input)
• XTALCK, XTAL
• MCK (output)
• MCK2 (output)
• ZRSTIC (output)
When the microcontroller is accessing RAM, the sub-CPU must wait if this pin is low.
Microcontroller data bus. Pull-up resistors are built in.
Interrupt request signal output to the microcontroller. A pull-up resistor is built in.
Interrupt request signal output from the IDE block to the microcontroller. An external pull-up resistor must be
connected to this pin.
Buffer DRAM data bus. A pull-up resistor is built in.
Buffer RAM address lines.
Buffer DRAM RAS outputs. Normally, ZRAS0 is used, but if two 1-Mb (64k
ZRAS0 and ZRAS1 are used, one for each of the chips.
Buffer DRAM CAS outputs. Normally, ZCAS0 is used, but if two 1-Mb (64k
ZCAS0 and ZCAS1 are used, one for each of the chips. When using a two-CAS type DRAM, connect ZCAS0 to
UCAS, and ZCAS1 to LCAS.
Buffer DRAM read output signal.
Buffer DRAM write output signals. Connected the corresponding DRAM pins.
These are the subcode interface connections. The LC895195 acquires subcode data by connection with the CD-
DSP and sends that data to the host.
The LC895195 reads in the CD-ROM data by connecting to the CD-DSP.
The C2PO pin is used for the C2 flags.
This is the LC895195 reset pin. The LC895195 is reset by a low level on this pin.
This pin must be held low for at least 1 µs when power is first applied.
These pins can drive a 16.9344-MHz or 33.8688-MHz oscillator.
Alternatively, an external clock can be input to the XTALCK pin.
This pin outputs either the XTALCK frequency or that frequency divided by 2. This output can be turned off.
This pin outputs either the XTALCK frequency or that frequency divided by 512. This output can be turned off.
This pin can be set to output a low level either by writing to the microcontroller write register R46 bit 7
(ZSYSRTS) or by setting the ZHRST pin (pin 103) low. This pin goes to the high-impedance state when both
ZSYSRST and ZHRST are high.
Since this pin has an open-drain circuit, an external pull-up resistor must be used.
LC895195
16 bits) chips are used, then both
16 bits) chips are used, then both
No. 5192-7/8

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