cx28348 Mindspeed Technologies, cx28348 Datasheet - Page 156
![no-image](/images/manufacturer_photos/0/4/449/mindspeed_technologies_sml.jpg)
cx28348
Manufacturer Part Number
cx28348
Description
Dual/triple/quad/hex/octal-enhanced Ds3/e3 Framer
Manufacturer
Mindspeed Technologies
Datasheet
1.CX28348.pdf
(195 pages)
- Current page: 156 of 195
- Download datasheet (2Mb)
Registers
Value after reset: 0000(h)
Direction: Read/Write
Value after enable: 0000(h)
FerrCtr[15:0]
Value after reset: 0000(h)
Direction: Read/Write
Value after enable: 0000(h)
DS3PthCtr[15:0]
3-44
DS3PthCtr[15] DS3PthCtr[14] DS3PthCtr[13] DS3PthCtr[12] DS3PthCtr[11] DS3PthCtr[10] DS3PthCtr[9]
DS3PthCtr[7]
FerrCtr[15]
FerrCtr[7]
15
15
7
7
DS3PthCtr[6]
FerrCtr[14]
FerrCtr[6]
Frame Error Counter—The counter increments for each error in the M- or F-bit framing
pattern in DS3 mode and for each error in the FAS/FA pattern in E3 mode. Errors are still
counted during an OOF condition (OOFAlm = 1).
DS3 Path Parity Error Counter—Increments the count for each M-frame in which the
calculated parity of the received data bits of the previous M-frame do not match a majority
vote of the three received CP-bits (C-bits in subframe 3).
14
14
6
6
DS3/E3 Frame Error Counter (Ctr03i)
DS3 Path Parity Error Counter (Ctr04i)
DS3PthCtr[5]
FerrCtr[13]
FerrCtr[5]
13
13
5
5
Mindspeed Technologies™
DS3PthCtr[4]
FerrCtr[12]
FerrCtr[4]
12
12
4
4
DS3PthCtr[3]
FerrCtr[11]
FerrCtr[3]
11
11
3
3
DS3PthCtr[2]
FerrCtr[10]
FerrCtr[2]
10
10
2
2
DS3PthCtr[1]
FerrCtr[1]
FerrCtr[9]
CX28342/3/4/6/8 Data Sheet
1
9
1
9
28348-DSH-001-B
DS3PthCtr[0]
DS3PthCt[8]
FerrCtr[0]
FerrCtr[8]
0
8
0
8
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