le9500 Zarlink Semiconductor, le9500 Datasheet - Page 24

• Manufacturer Part Number: le9500
• Description: Igh-voltage Ringing Slic Device For Volp Applications
• Manufacturer: Zarlink Semiconductor

REVISION HISTORY
Revision A1 to B1
•
•
•
•
•
•
•
•
•
•
Revision B1 to C1
•
•
Revision C1 to D1
•
Revision D1 to E1
•
•
Revision E1 to F1
•
•
•
Revision F1 to F2
•
Revision F2 to G1
•
•
•
•
•
•
•
•
•
•
•
•
•
Revision G1 to G2
•
Added Note 1 to 5V Supply Currents and Power Dissipation tables.
Updated typical values for 3.3V and 5V Supply Currents and Power Dissipation tables.
Added Le9500C section with "TBD" values.
Removed "150V" from "150V HV7 Technology", page 1.
Corrected Battery Supply and Office Battery Supply specifications for absolute and electrical ranges, page 6.
Fixed "5-V" and "5 V" formatting on power dissipation tables, page10.
Corrected typical values for Table 1, added "Note 2" to Longitudinal to Metallic Balance, and "Note 3" to metallic to Longitu-
dinal Balance, page 11.
Applied "Note 2" to Psophometric and 3-kHz Flat ICN, page 12.
Combined Ground Start Hysteresis to one line, and added "Note 1" to Differential Gain on Table 6, page 13.
Corrected wording "(-65V to 105V)" to be "(-65V to -100V)" under the power control section, page 18.
Removed standard OPNs and added green package OPNs in
Added
Added Le9500D device information.
In
In
In
In
Added
Added a note (the new note 1) under the Thermal Characteristics table on page 7 and removed the corresponding state-
ment about TSD in the note under the ABSOLUTE MAXIMUM RATINGS table on page 6.
Removed descriptions and specifications related to Vcc = 5 V.
Added BCM3367/3368 to
Updated
Added test conditions to
Updated Loop Closure Thresholds and Hysteresis in
Updated PSRR for V
Corrected the DCOUT gain in
Updated Ring Signal Distortion and Differential Gain RINGINP/N to PT/PR in
page 11
Updated descriptions to
Updated descriptions to
Ramp
Updated descriptions to
Added Reference Schematic B, on page 21.
Added Parts List B, on page 22.
Added new headers/footers due to Zarlink purchase of Legerity on August 3, 2007
Ordering Information, on page
Electrical Characteristics, on page
Absolute Maximum Ratings, on page
Ring Trip, on page
Package Assembly, on page 6
Power Ringing with Le9500D, on page 18
Time, on page 17
Thermal Characteristics, on page
CC
11, added pre-trip condition for the Le9500D device.
to reflect V
DC Loop Current Limit, on page
Battery Reversal Rate, on page 17
Power Ring, on page
Line Characteristics, on page
Applications, on page
.
Table 2,
1, added column for packing; added Note 2 for instructions on tape/reel ordering.
CC
7,changed the Active State /PT-PR/-/Vbat2/ maximum from 7.75 V to 8.5 V.
= 3.3 V in
Analog Pin
6, separated ratings for VBAT1 in non-ringing and ringing states.
7.
17.
Zarlink Semiconductor Inc.
Table 1,
1.
Characteristics, on page 10
Table 1,
9.
Two-Wire
16.
24
and
Two-Wire
Ordering Information, on page 1
Table 10,
Port, on page 9
Port, on page 9
CFB1 and CFB2 Values versus Typical
Table 5,
.
Ringing
.
Specifications, on