le9500 Zarlink Semiconductor, le9500 Datasheet - Page 17

no-image

le9500

Manufacturer Part Number
le9500
Description
Igh-voltage Ringing Slic Device For Volp Applications
Manufacturer
Zarlink Semiconductor
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
le9500ABJC
Manufacturer:
ZARLINK
Quantity:
66
Part Number:
le9500ABJC
Manufacturer:
ALTERA
0
Part Number:
le9500ABJC
Manufacturer:
LEGERITY
Quantity:
20 000
Part Number:
le9500ABJCT
Manufacturer:
LEGERIEY
Quantity:
20 000
Part Number:
le9500ABJCT.JA
Manufacturer:
Zarlink
Quantity:
305
Part Number:
le9500ABJCT.JC
Manufacturer:
Zarlink
Quantity:
336
Part Number:
le9500ABJCT.JD
Manufacturer:
Zarlink
Quantity:
15 628
Part Number:
le9500AGF
Manufacturer:
Legerity
Quantity:
5
Part Number:
le9500CBJC
Manufacturer:
ALTERA
0
Part Number:
le9500CBJC
Manufacturer:
LEGERITY
Quantity:
20 000
Company:
Part Number:
le9500CBJC
Quantity:
199
Part Number:
le9500CBJCT
Manufacturer:
LEGERITY
Quantity:
8 000
Company:
Part Number:
le9500CBJCT.JC
Quantity:
3 600
Part Number:
le9500CBJCT.JF
Manufacturer:
LEGERITY/PBF
Quantity:
1 500
Part Number:
le9500CBJCT.JF
Manufacturer:
LEGERITY
Quantity:
8 000
Company:
Part Number:
le9500CBJCT.JF
Quantity:
203
I
If the minimum loop current allowed is 22 mA and V
This includes telephone set at the end of the loop.
The Le9500 device is intended for short-loop applications and, therefore, could always be in current limit during off-hook
conditions. The above equation does not apply when the DC current is in the current limit region.
The actual maximum loop length the device can support, however, is often limited by the ringing loop length rather than the DC
loop length (with adequate amplitude of V
Battery Reversal Rate
The rate of battery reverse is controlled or ramped by capacitors C
typical ramp time is given below. Leave FB1 and FB2 open if it is not desired to ramp the rate of battery reversal. Use with 0.47
µF for CTX.
The voltage seen on FB1 and FB2 pins on the SLIC can be close to VBAT1. The value of C
µF is not recommended.
Supervision
The Le9500 device offers the loop closure and ring trip supervision functions. Internal to the device, the outputs of these detectors
are multiplexed into a single package output, NSTAT. The ring trip detector is valid on NSTAT during the ring state, and loop
closure detector is valid on NSTAT during active and on-hook transmission states. Additionally, common-mode current is detected
for ground start applications. This status is output onto NSTAT and is valid during ground start mode.
Loop Closure
The loop closure has a fixed on-hook to off-hook threshold in Scan/Active/OHT states with hysteresis.
Ring Trip
The ring trip detector requires only a single-pole filter at the input, minimizing external components. An R/C combination of
383 kΩ and 0.1 µF, for a filter pole at 5.15 Hz, is recommended.
The ring trip threshold is internally fixed as a function of battery voltage and is given by the following:
where:
R
V
There is a typical 10 mA hysteresis.
Ground Start
In the ground start applications, the loop closure detector is also used to indicate ring-ground has occurred. During ground start
mode, loop current will be common mode, rather than differential as in loop start mode. Thus, in ground start the threshold of the
loop closure detector is reduced by one half the threshold seen in the loop start mode. This output is seen at the NSTAT output
pin.
Power Ring
The device offers a ring state, in which a balanced power ring signal is provided to the tip/ring pair. During the ring state, a user-
supplied low-voltage ring signals are input to the device’s RING
power ring signals. The user may supply a sine wave input, PWM input, or a square wave to produce sinusoidal or trapezoidal
ringing at tip and ring.
LOOP
BAT1
T
is ring trip current in mA.
is the loop DC current, no more than DC current limit.
is the magnitude of the ring battery in V.
Table 10. C
FB1
C
FB1
and C
0.001 µF
0.022 µF
0.047 µF
0.01 µF
0.15 µF
0.1 µF
and C
FB2
FB2
Values versus Typical Ramp Time
BAT2
R
T
).
(mA) = 67 * {(0.0045 * V
Zarlink Semiconductor Inc.
BAT2
is –21V then the maximum loop resistance by the equation is 487 Ω.
17
INP/N
FB1
inputs. These signals are amplified to produce the balanced
Transition Time
BAT1
and C
) + 0.317}
100 ms
220 ms
320 ms
20 ms
50 ms
2 ms
FB2
. A chart showing C
FB1
and C
FB1
FB2
and C
being greater than 0.22
FB2
values versus

Related parts for le9500