adc-305 C&D Technologies., adc-305 Datasheet - Page 2

• Manufacturer Part Number: adc-305
• Description: 8-bit, 20mhz Cmos A/d Converters
• Manufacturer: C&D Technologies.

ADC-305
ABSOLUTE MAXIMUM RATINGS (T
FUNCTIONAL SPECIFICATIONS
(Specification are typical at T
+5v, f
Footnotes:
PARAMETERS
Power Supply Voltage (+AV
Analog Input Voltage (V
Reference Input Voltage (V
Digital Input Voltage (V
Digital Output Voltage (V
ANALOG INPUTS
Input Voltage Range (V
Input Capacitance
Input Impedance
Input Signal Bandwidth
REFERENCE INPUTS
Ref. Resitance
Ref. Current
Ref. Voltage
Offset Voltage
Self Bias I
Self Bias II
DIGITAL INPUTS
Input Voltage (CMOS)
Input Current (@V
Clock Pulse Width T
DIGITAL OUTPUTS
Output Data
Output Voltage
Output Current
Output Current
Output Data Delay, Td
PERFORMANCE
Resolution
Maximum Sampling Rate
Minimum Sampling Rate
Aperature Delay, T
Aperature Jitter
Differential Linearity Error
Integral Linearity Error
Differential Gain Error
Differential Phase Error
Short V
See Technical Note 4
Short V
Short V
Short V
S
(V
(V
Logic Levels (V
Logic Level (V
(@V
(A/D CLK)
Logic Level "1"
Logic Level "0"
Logic Level "1"
Logic Level "0"
= 20MHz sampling unless otherwise specified.)
IN
IN
-2Vp-p, –1dB)
= 1.5Vdc+0.07V
IL
RB
RT
RB
RT
=0) "0"
(pin 23) to V
(pin 17) to V
(pin 17) to V
(pin 23) to A GND.
IL
IH
V
V
V
V
V
V
V
V
IH
A
) "0"
T
RT
RT
RB
RT
RB
RBS
RTS
RTS
) "1"
=+DV
PW1
PW0
RBS
to V
RTS
RTS
IH
-V
IN
IN
RMS
, V
OH
)
)
A
RBS
S
RT
RB
(pin 22).
(pin 16).
(pin 16).
)"1"
S
IL
, V
= +25°C, +V
)
, +DV
)
, V
OL
RB
)
S
)
)
MIN.
+1.96
+2.25
+1.8
+0.6
+3.7
–1.1
230
–10
4.5
RT
+4
25
25
20
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
0
0
8
–0.5
–0.5
–0.5
–0.5
–0.5
MIN
= +2.5V, V
OE=OV, V
V
OE=+DV
NTSC 40IRE mode ramp, 14.3MHz
sampling
OL
3-State TTL compatible
+0.5 to +2.5
=+0.4V
8-bit Binary Parallel
TYP.
+0.64
+2.09
+2.39
12.5
±0.3
+0.5
300
–35
+15
RB
6.6
0.5
11
18
18
30
+DV
+DV
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
+AV
+AV
4
1
A
S
OH
, V
MAX
= +0.5V, +AV
= 25°C)
+7
S
S
=+DV
OH
S
S
+0.5
+0.5
+0.5
+0.5
=+DV
S
MAX.
–0.5V,
+0.68
+2.21
+2.53
+2.8
±0.5
+1.3
450
V
–60
+45
S
8.7
0.5
—
—
—
—
—
+1
—
—
—
—
16
16
30
—
—
—
—
—
—
5
5
, V
RT
S
OL
= +DV
UNITS
=0V
Volts
Volts
Volts
Volts
Volts
UNITS
Volts
Volts
Volts
Volts
Volts
Volts
Volts
Volts
MHz
MHz
MHz
LSB
LSB
deg
k
mA
mV
mV
mA
mA
S
pF
µA
µA
µA
µA
ns
ns
ns
Bit
ns
ps
%
=
2
TECHNICAL NOTES
1. The ADC-305 has separate +AV
2. Bypass all power lines to ground with a 0.1µF ceramic chip
3. Even though the analog input capacitance is a low 15pF, it
4. The input voltage range is determined by voltages applied
Self Bias Mode
a. Tie V
b. Tie V
PHYSICAL/ENVIRONMENTAL
+0.9922V
+1.9922V
POWER REQUIREMENTS
Power Supply (+AV
Power Supply Current
Power Dissipation
Operating Temp. Range
Storage Temp. Range
Package Type
Weight
+1.000V
recommended that both +AV
single supply since a time lag between start up of separate
supplies could induce latch up. Other external logic circuits
must be powered from a separate digital supply. +DV
11 and 13) and +AVs (pins 14, 15 and 18) should be tied
together externally. DGND (pins 2 and 24) and AGND (pins
20 and 21) should also be tied together externally. Power
supply grounds must be connected at one point to the
ground plane directly beneath the device. Digital returns
should not flow through analog grounds.
capacitor in parallel with a 47µF electrolytic capacitor.
Locate the bypass capacitor as close to the unit as
possible.
is recommended that high frequency input be provided via
a high speed buffer amplifier. A parasitic oscillation may be
generated when a high speed amplifier is used. A 75 ohm
resister inserted between the output of an amplifier and the
analog input of the ADC-305 will improve the situation. A
resistor larger than 100 ohms may degrade linearity.
to V
to the following equations;
The analog input range is normally 2Vp-p.
input range in this case is +0.64V to +2.73V nominal.
analog input voltage range is 0 to +2.39V in this case.
I A GND - D GND I
V
O
IN
V
RB
RB
RB
0V V
1.8V V
(Reference Bottom) and V
to V
to AGND, and tie V
+1/2FS –1LSB
RB
RBS
+1/2FS
Table 1. Digital Output Coding
CODE
Zero
S
RT
+FS
, +DV
ADC-305-1
ADC-305-3
ADC-305-1
ADC-305-3
V
, and tie V
–V
RT
S
RB
)
2.8V
2.8V
RT
MIN.
+4.75
DEC
RT
to V
127
128
255
—
—
—
S
0
to V
STEP
and +DV
RTS
S
RT
RTS
and +DV
24-pin Plastic SOP
respectively. The analog
®
24-pin Plastic DIP
TYP.
(Reference Top). Keep
HEX
+5.0
–55 to +150°C
12
60
respectively. The
7F
FF
—
00
80
–40 to +85°C
2.0 grams
0.3 grams
S
be powered from a
S
DATA BITS OUT
MSB
0 0 0 0
0 1 1 1
1 0 0 0
1 1 1 1
MAX.
pins. It is
+5.25
100
17
85
UNITS
0 0 0 0
1 1 1 1
0 0 0 0
1 1 1 1
S
Volts
mW
mV
mA
LSB
(pins
®