h5ps1g83nfr Hynix Semiconductor, h5ps1g83nfr Datasheet - Page 11

• Manufacturer Part Number: h5ps1g83nfr
• Description: 1gb Ddr2 Sdram
• Manufacturer: Hynix Semiconductor

Rev. 0.1 / Feb. 2010
3.2 DC & AC Logic Input Levels
3.2.1 Input DC Logic Level
3.2.2 Input AC Logic Level
3.2.3 AC Input Test Conditions
Note:
1. Input waveform timing is referenced to the input signal crossing through the V
2. The input signal minimum slew rate is to be maintained over the range from V
3. AC timings are referenced with input waveforms switching from VIL(ac) to VIH(ac) on the positive transitions
Symbol
V
V
V
IH
IL
SWING(MAX)
under test.
edges and the range from V
and VIH(ac) to VIL(ac) on the negative transitions.
Symbol
Symbol
V
V
(ac)
(ac)
SLEW
IH
IL
V
V
REF
(dc)
(dc)
SWING(MAX)
Falling Slew =
ac input logic HIGH
ac input logic LOW
Parameter
delta TF
Input signal maximum peak to peak swing
dc input logic HIGH
dc input logic LOW
V
Input signal minimum slew rate
Parameter
REF
< Figure: AC Input Test Signal Waveform>
delta TF
REF
Input reference voltage
- V
to V
IL(ac)
Condition
IL(ac)
max
VREF + 0.200
max for falling edges as shown in the figure below.
Min.
-
VREF + 0.125
DDR2 667,800
Min.
- 0.3
delta TR
Rising Slew =
VREF - 0.125
VDDQ + 0.3
VREF - 0.200
0.5 * V
Max.
Value
Max.
1.0
1.0
-
DDQ
REF
REF
V
to V
level applied to the device
IH(ac)
IH(ac)
delta TR
min - V
Units
Units
V/ns
H5PS1G83NFR
min for rising
V
V
V
V
V
V
V
V
V
V
V
Units
DDQ
REF
IH(ac)
IH(dc)
IL(dc)
IL(ac)
SS
V
V
REF
max
max
min
min
Notes
Notes
Notes
2, 3
1
1
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